JPS6285538A - digital modulator - Google Patents

Abstract

(57) [Summary] This bulletin contains application data before electronic filing, so abstract data is not recorded.

Description

DETAILED DESCRIPTION OF THE INVENTION [Field of Application of the Invention] The present invention relates to a digital modulator formed using digital signal processing, and particularly to a digital phase modulator suitable for PSK modulation.

[Background of the invention]

When a phase shifter that modulates the data to be transmitted with orthogonal carrier waves, such as a 4-phase phase modulator, is constructed using digital signal processing technology, only the waveform shaping of the digital input signal is digitally processed. The main method for modulating carrier waves is analog processing. In addition, a circuit for digitally modulating a carrier wave (Japanese Unexamined Patent Publication No. 53-24
763) is also known, but it requires a plurality of ROMs, adders, etc., resulting in a complicated circuit. Furthermore, when a high data rate is required, the speed increase is prevented due to ROM access time and the like.

[Purpose of the invention]

The present invention does not use any adders and uses read-only memory (
The purpose of the present invention is to use a digital circuit to realize a PSK modulator that can simultaneously perform waveform shaping filtering and carrier modulation operations using a ROM (ROM), and can handle increased data rates of input signals.

[Summary of the invention]

An outline of the present invention will be explained with reference to FIGS. 1 and 2. 1st
The figure shows the unit impulse response of the waveform shaping filter. Here, fn is the data rate of input data, and Ts+ represents the operation sampling period. FIG. 2 shows the waveform of this time response superimposed by focusing on a certain bit length of continuous human input data. Now, assume that the operating sampling frequency is eight times the data rate. This discrete signal of the superposition of time responses is calculated and obtained for every input data pattern, and the obtained values are alternately inverted to positive and negative and stored in memory. Therefore, by determining the address from the input data pattern and information indicating the sampling point and accessing the memory, the desired discrete value of the modulated wave can be obtained. Here, a memory corresponding to the number of samplings (8 in this case) for the input data rate is prepared, and the MWl value is stored as a dedicated memory corresponding to the sampling position within one data.

A desired modulated wave can be obtained by accessing the contents of all the memories simultaneously from the input data pattern and sequentially selecting the values obtained thereby according to the sampling position. From the above, it is possible to obtain a digital modulator that can access memory at the same frequency as the data rate of input data and can be applied to high-rate transmission.

[Embodiments of the invention]

Hereinafter, the present invention will be explained in detail using the drawings.

The third phase change is performed using conventional analog processing.
This is the block configuration of the L unit. J-4, 2J3 and 4 are waveform shaping filters with a roll-off of a certain value with respect to the Nyquist rate, 3 is a carrier wave or intermediate frequency local oscillator, 5 and 7 are balanced modulators, 6 is 90" phase thick, 8 9 is an adder, and 9 is a -1 tF band-limiting filter.Since the operation of these components is generally well known, their explanation will be omitted.

FIG. 4 is a block diagram showing the configuration of an embodiment of the digital modulator according to the present invention, and is a portion that performs the function of the portion surrounded by 10 in FIG. 3. 11 and 20 are n-stage shift registers, 12 and 19 are read-only memories (R
OM), 13 years old.

Hereinafter, the configuration and operation of the embodiment will be explained using FIG. 4.
Let us consider the QPSK transformer P-phase data. In addition, the operating sampling frequency is set here to be eight times the input data rate. Input data is transferred to n-stage shift register 1
1, it is converted into an n-bit parallel data pattern. There are a total of 2 degrees of this data pattern. Further, the quantized dispersion value data, which can perform the above-mentioned waveform shaping filtering and carrier e-adjustment simultaneously, is accessed by the data pattern as address information of a ROM stored in advance. The contents of these eight ROMs store discrete values divided according to sampling points within one data.

The output is in a time series in the order of Rn→Rδ.

These discrete values are stored along the time axis. One or more operations selected by the counter [4] are performed alternately on the P channel and the Q channel, and the 11 failure values of P and Q that are obtained alternately are D/A.
A desired modulated wave can be obtained by passing it through the converter 16.

By changing the operation CLK of the shift registers 11 and 20 in FIG. 4, it is possible to perform (OQPSK) modulation on the offset QPS. Also, if we focus only on the P phase, BPSK
Can be used as a modulator.

〔Effect of the invention〕

According to the present invention, the discrete modulation waveform, which is calculated based on the time response of the waveform shaping filter determined in advance by a computer or the like and written in the ROM, is converted into input data and the value of the counter indicating the sampling point. Since the method is adopted in which the data is read out and selected accordingly and outputted to the D/A converter, a phase modulator that can handle high-speed dot rates can be created with a simple circuit without the need for multipliers or adders.

Therefore, performance is improved, adjustment is omitted, and the scale of the 9 circuits is reduced.

It has many effects such as reducing power consumption.

[Brief explanation of drawings]

Figure 1 shows a waveform that shows the time response of a waveform shaping filter, Figure 2 shows a waveform that shows the time response of a waveform shaping filter that corresponds to the contents of a certain n-stage shift register, and Figure 3 shows an analog waveform. FIG. 4 is a block diagram of a general QPSK modulator configured as shown in FIG. 1...Shift register, 2...Shift register, 3
... Carrier station output, 4... Shift register, 5...
Balanced mixer, 6...90'' phase shifter, 7... Balanced mixer, 8... Adder, 9... Band limit filter,
10... Modulation section, 11... Shift register, 12.
...Memory, 13...Multiplexer, 14...Counter, 15...Multiplexer, 16...D/A
Converter, 17... Multiplexer, 18... Counter, 19... Memory, 20... Shift register. Otsu

Claims (1)

[Claims] 1. Operation sampling in a digital modulator in which waveform shaping filtering and carrier modulation are performed simultaneously by reading out the contents of a storage element using a continuous bit pattern of input data as address information. By preparing a number of storage elements equal to the number of multiple sample points in one input data according to the period, and storing discrete values for every data pattern according to the sample points, the input data pattern can be stored. A digital modulator, characterized in that the contents of a single storage element are obtained as discrete values of a modulated wave by indexing the selection of sample points as address information. 2. In the digital modulator according to item 1, the first
A digital modulator in which the storage means of the means is constituted by a read-only memory (ROM).