JPS63100701A - Manufacture of melf type laminated chip varistor - Google Patents
Manufacture of melf type laminated chip varistorInfo
- Publication number
- JPS63100701A JPS63100701A JP61246600A JP24660086A JPS63100701A JP S63100701 A JPS63100701 A JP S63100701A JP 61246600 A JP61246600 A JP 61246600A JP 24660086 A JP24660086 A JP 24660086A JP S63100701 A JPS63100701 A JP S63100701A
- Authority
- JP
- Japan
- Prior art keywords
- slit
- varistor
- external connection
- prismatic
- precursor
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 238000004519 manufacturing process Methods 0.000 title claims description 11
- 239000000203 mixture Substances 0.000 claims description 19
- 239000002245 particle Substances 0.000 claims description 19
- 239000000919 ceramic Substances 0.000 claims description 17
- 239000002243 precursor Substances 0.000 claims description 17
- 229910052751 metal Inorganic materials 0.000 claims description 16
- 239000002184 metal Substances 0.000 claims description 16
- 238000000034 method Methods 0.000 claims description 9
- OKTJSMMVPCPJKN-UHFFFAOYSA-N Carbon Chemical compound [C] OKTJSMMVPCPJKN-UHFFFAOYSA-N 0.000 claims description 8
- 229910052799 carbon Inorganic materials 0.000 claims description 8
- 238000005245 sintering Methods 0.000 claims description 5
- 239000002904 solvent Substances 0.000 claims description 5
- 238000000227 grinding Methods 0.000 claims description 3
- 238000010030 laminating Methods 0.000 claims description 3
- 229910044991 metal oxide Inorganic materials 0.000 claims description 3
- 150000004706 metal oxides Chemical class 0.000 claims description 3
- 238000003825 pressing Methods 0.000 claims description 3
- 239000011148 porous material Substances 0.000 claims description 2
- 229920005992 thermoplastic resin Polymers 0.000 claims description 2
- 238000001035 drying Methods 0.000 claims 2
- 239000007772 electrode material Substances 0.000 description 8
- 239000010410 layer Substances 0.000 description 8
- 239000003973 paint Substances 0.000 description 7
- YXFVVABEGXRONW-UHFFFAOYSA-N Toluene Chemical compound CC1=CC=CC=C1 YXFVVABEGXRONW-UHFFFAOYSA-N 0.000 description 6
- XLOMVQKBTHCTTD-UHFFFAOYSA-N Zinc monoxide Chemical compound [Zn]=O XLOMVQKBTHCTTD-UHFFFAOYSA-N 0.000 description 6
- 239000005416 organic matter Substances 0.000 description 4
- 230000000694 effects Effects 0.000 description 3
- 229910052745 lead Inorganic materials 0.000 description 3
- 230000008646 thermal stress Effects 0.000 description 3
- 239000011787 zinc oxide Substances 0.000 description 3
- CSCPPACGZOOCGX-UHFFFAOYSA-N Acetone Chemical compound CC(C)=O CSCPPACGZOOCGX-UHFFFAOYSA-N 0.000 description 2
- 238000001816 cooling Methods 0.000 description 2
- 230000007547 defect Effects 0.000 description 2
- 230000006866 deterioration Effects 0.000 description 2
- 238000010438 heat treatment Methods 0.000 description 2
- 238000002844 melting Methods 0.000 description 2
- 230000008018 melting Effects 0.000 description 2
- 150000002739 metals Chemical class 0.000 description 2
- 239000002356 single layer Substances 0.000 description 2
- 239000004925 Acrylic resin Substances 0.000 description 1
- 229920000178 Acrylic resin Polymers 0.000 description 1
- 229910019830 Cr2 O3 Inorganic materials 0.000 description 1
- MQIUGAXCHLFZKX-UHFFFAOYSA-N Di-n-octyl phthalate Natural products CCCCCCCCOC(=O)C1=CC=CC=C1C(=O)OCCCCCCCC MQIUGAXCHLFZKX-UHFFFAOYSA-N 0.000 description 1
- 239000004372 Polyvinyl alcohol Substances 0.000 description 1
- BQCADISMDOOEFD-UHFFFAOYSA-N Silver Chemical compound [Ag] BQCADISMDOOEFD-UHFFFAOYSA-N 0.000 description 1
- 235000002597 Solanum melongena Nutrition 0.000 description 1
- 244000061458 Solanum melongena Species 0.000 description 1
- 229920006397 acrylic thermoplastic Polymers 0.000 description 1
- 239000000853 adhesive Substances 0.000 description 1
- 230000001070 adhesive effect Effects 0.000 description 1
- 239000000956 alloy Substances 0.000 description 1
- 229910045601 alloy Inorganic materials 0.000 description 1
- 230000015572 biosynthetic process Effects 0.000 description 1
- BJQHLKABXJIVAM-UHFFFAOYSA-N bis(2-ethylhexyl) phthalate Chemical compound CCCCC(CC)COC(=O)C1=CC=CC=C1C(=O)OCC(CC)CCCC BJQHLKABXJIVAM-UHFFFAOYSA-N 0.000 description 1
- 239000003985 ceramic capacitor Substances 0.000 description 1
- 229910052804 chromium Inorganic materials 0.000 description 1
- 229910052802 copper Inorganic materials 0.000 description 1
- 238000005336 cracking Methods 0.000 description 1
- 230000006378 damage Effects 0.000 description 1
- 230000002542 deteriorative effect Effects 0.000 description 1
- 238000010586 diagram Methods 0.000 description 1
- 238000007606 doctor blade method Methods 0.000 description 1
- 235000013399 edible fruits Nutrition 0.000 description 1
- 239000008240 homogeneous mixture Substances 0.000 description 1
- 229910052746 lanthanum Inorganic materials 0.000 description 1
- MRELNEQAGSRDBK-UHFFFAOYSA-N lanthanum oxide Inorganic materials [O-2].[O-2].[O-2].[La+3].[La+3] MRELNEQAGSRDBK-UHFFFAOYSA-N 0.000 description 1
- 229910000464 lead oxide Inorganic materials 0.000 description 1
- 239000000463 material Substances 0.000 description 1
- KTUFCUMIWABKDW-UHFFFAOYSA-N oxo(oxolanthaniooxy)lanthanum Chemical compound O=[La]O[La]=O KTUFCUMIWABKDW-UHFFFAOYSA-N 0.000 description 1
- YEXPOXQUZXUXJW-UHFFFAOYSA-N oxolead Chemical compound [Pb]=O YEXPOXQUZXUXJW-UHFFFAOYSA-N 0.000 description 1
- MMKQUGHLEMYQSG-UHFFFAOYSA-N oxygen(2-);praseodymium(3+) Chemical compound [O-2].[O-2].[O-2].[Pr+3].[Pr+3] MMKQUGHLEMYQSG-UHFFFAOYSA-N 0.000 description 1
- 229920002451 polyvinyl alcohol Polymers 0.000 description 1
- 239000000843 powder Substances 0.000 description 1
- 229910003447 praseodymium oxide Inorganic materials 0.000 description 1
- 239000010970 precious metal Substances 0.000 description 1
- 229920005989 resin Polymers 0.000 description 1
- 239000011347 resin Substances 0.000 description 1
- 229910052709 silver Inorganic materials 0.000 description 1
- 239000004332 silver Substances 0.000 description 1
- 239000002893 slag Substances 0.000 description 1
- 229910000679 solder Inorganic materials 0.000 description 1
- 238000005476 soldering Methods 0.000 description 1
- 230000035882 stress Effects 0.000 description 1
- 229910052717 sulfur Inorganic materials 0.000 description 1
- 229910052718 tin Inorganic materials 0.000 description 1
- 239000003039 volatile agent Substances 0.000 description 1
- XLYOFNOQVPJJNP-UHFFFAOYSA-N water Substances O XLYOFNOQVPJJNP-UHFFFAOYSA-N 0.000 description 1
- 230000003313 weakening effect Effects 0.000 description 1
- 229910052725 zinc Inorganic materials 0.000 description 1
- 239000011701 zinc Substances 0.000 description 1
Landscapes
- Thermistors And Varistors (AREA)
Abstract
(57)【要約】本公報は電子出願前の出願データであるた
め要約のデータは記録されません。(57) [Abstract] This bulletin contains application data before electronic filing, so abstract data is not recorded.
Description
【発明の詳細な説明】
[発明の目的]
(産業上の利用分野)
本発明は表面実装に適したメルフ型積層チップバリスタ
の製造方法に関する。DETAILED DESCRIPTION OF THE INVENTION [Object of the Invention] (Industrial Application Field) The present invention relates to a method for manufacturing a Melf-type multilayer chip varistor suitable for surface mounting.
(従来の技術)
近年、バリスタの用途拡大に伴い#?4層型で、かつチ
ップ化構造のバリスタの雪要が増大してきている。(Conventional technology) In recent years, with the expansion of applications for varistors, #? The demand for varistors of four-layer type and chip structure is increasing.
従来、提案されているI!1層セクセラミック電子部品
造技術として特開昭61−87313号公報がある。該
公報に開示されている技術は、内部電極を形成したセラ
ミックシートを複数枚槓み重ね焼成し、前記内部電極が
交互に相対向端面に導出されるよう層状に埋設されてな
る角形積層体の前記内部電極の導出端面を除く周側面を
研削して円柱状積層体を形成し、前記内部電極の導出端
面に外部接続用電極を付与し、さらに該外部接続用電極
形成両端部に円筒状金属キャップを嵌合するようにする
ものであり、上記公報はセラミックコンデンサに関する
ものであるが、セラミックバリスタに適用できることは
容易である。しかして、上記公報に開示された積層セラ
ミック電子部品は外形形状が円柱状であるため、部品と
しての方向性がなくなり、基板への自動装着が容易とな
り、かつ円筒状金属キ1?ツブとなるためキャップの嵌
合が容易で確実な接続状態を得ることができ、また金属
キャップの存在によって基板への装着的外部接続用電極
に直接ハンダ付けを必要としないため、外部接続用電極
としてのAQがハンダくわれによって厚みが薄くなり基
板との接着強度が弱くなることによって引起こされるメ
カニカルなシコックやり一マルストレスなどにより簡単
に断線状態となる致命的な欠点が解消できる効果を合せ
もつもので、このF&積層セラミック電子部品として注
目に価する。しかしながら、上記構成によるものはセラ
ミックシートと内部電極が同時焼結となるもので、例え
ば酸化並鉛を主成分とするバリスタの場合1100℃以
上の焼結温度であるため内部電極材料も負金属に限定さ
れ高価となる。またバリスタ組成に酸化どスマス、酸化
プラセオジウムを含むものは内部電極と反応し電極を侵
食する結果、所望の内部電極形成が困難であり、かつ特
性劣化の要因となるものであった。さらに内部電極金属
の線膨張係数はバリスタ焼結体より一桁大きいため使用
中に加えられる熱ストレスがあった場合クラック発生の
原因となり積層バリスタの製造方法としては好ましいも
のとは言えなかった。Previously proposed I! Japanese Patent Application Laid-open No. 87313/1983 describes a technology for manufacturing single-layer ceramic electronic components. The technique disclosed in this publication is to produce a prismatic laminate in which a plurality of ceramic sheets on which internal electrodes are formed are laminated and fired, and the internal electrodes are buried in layers so that they are alternately led out to opposite end faces. A cylindrical laminate is formed by grinding the circumferential side surface of the internal electrode excluding the lead-out end face, an external connection electrode is provided on the lead-out end face of the internal electrode, and a cylindrical metal is provided on both ends of the external connection electrode formation. Although the above publication relates to a ceramic capacitor, it can easily be applied to a ceramic varistor. However, since the multilayer ceramic electronic component disclosed in the above publication has a cylindrical outer shape, there is no directionality as a component, and automatic mounting on a board is easy. Since the cap is a tab, it is easy to fit the cap and a reliable connection can be obtained.Also, the presence of the metal cap eliminates the need for direct soldering to the electrode for external connection to the board. This has the effect of eliminating the fatal defect that AQ easily breaks due to mechanical stress caused by thinning of the AQ due to solder cracks and weakening of the adhesive strength with the board. This F& multilayer ceramic electronic component is worthy of attention. However, in the structure described above, the ceramic sheet and the internal electrode are sintered at the same time. For example, in the case of a varistor whose main component is normal lead oxide, the sintering temperature is over 1100°C, so the internal electrode material is also a negative metal. Limited and expensive. Furthermore, varistors containing dosmuth oxide or praseodymium oxide react with the internal electrodes and corrode the electrodes, making it difficult to form the desired internal electrodes and causing characteristic deterioration. Furthermore, since the coefficient of linear expansion of the internal electrode metal is one order of magnitude larger than that of the varistor sintered body, cracks may occur if thermal stress is applied during use, which is not a desirable method for manufacturing a laminated varistor.
したがって、特開昭56−1501号公報に開示されて
いるように内部電極の形成手段として焼結体に層状の空
隙を形成し、該空隙に導電塗料を充填し該導Ti塗料を
内部電極とする。すなわち内部電極をセラミックシート
焼結時同時焼付を行わない方法を用いることも考えられ
るが、導電塗料が長時間高温状態で使用されたとき塗料
に含まれる有機物が炭化しバリスタ組成としての焼結体
層とのコンタクトが保持できなくなり、コンタクト面で
放電が生じ、炭化した有機物が変質しバリスタ組成を部
分的に還元し漏れ電流が大きくなり発熱し最終的に熱暴
走し破壊にいたる重大欠点となる危険性を有し信頼性に
欠けるものであった。Therefore, as disclosed in JP-A-56-1501, layered voids are formed in a sintered body as a means for forming internal electrodes, and the voids are filled with a conductive paint, and the conductive Ti paint is used as the internal electrode. do. In other words, it is possible to use a method that does not simultaneously bake the internal electrodes when sintering the ceramic sheet, but when the conductive paint is used at high temperatures for a long time, the organic matter contained in the paint will carbonize and the sintered body as a varistor composition may be used. It becomes impossible to maintain contact with the layer, discharge occurs on the contact surface, the carbonized organic matter changes quality, partially reduces the varistor composition, increases leakage current, generates heat, and eventually causes thermal runaway, resulting in a serious defect leading to destruction. It was dangerous and unreliable.
(発明が解決しようとする問題点)
以上のように従来開示されている技術の筒部で得られる
積層バリスタでは、実用上程々の問題をかかえる結果と
なり解決すべき多くの課題をもつものであった。(Problems to be Solved by the Invention) As described above, the laminated varistors obtained with the cylindrical portion of the conventionally disclosed technology have moderate practical problems and have many problems to be solved. Ta.
本発明は、上記の点に鑑みてなされたもので、作業性容
易にしてコストダウンに貢献できることはもとより、前
述した従来技術がもつそれぞれの欠点をすべて解決し特
性劣化なく信頼性に富むメルフ型積層チップバリスタの
製造方法を提供することを目的とするものである。The present invention has been made in view of the above points, and it not only facilitates workability and contributes to cost reduction, but also solves all of the drawbacks of the prior art described above, and provides a highly reliable Melf type without deterioration of characteristics. It is an object of the present invention to provide a method for manufacturing a multilayer chip varistor.
[発明の構成]
(問題点を解決するための手段)
本発明のメルフ型!F4層チップバリスタの製造方法は
、バリスタ組成と同一組成からなる焼成粒子、カーボン
粒子、熱可塑性樹脂および揮発性溶剤からなるスリット
前駆ベースを印刷−乾燥しスリット前駆膜を前面に形成
した成形シートを用い、前記スリット前駆膜が交互に相
対向端面に導出されるよう複数積層し加熱圧着し得た角
柱状積層体を徐々に昇温−高温焼結し、114記スリツ
ト前駆膜のカーボン粒子および揮梵成分を除去しこの部
分に複数の柱状セラミック粒子を有するスリットを形成
した角柱状焼結体を得る。[Structure of the invention] (Means for solving the problems) Melf type of the present invention! The manufacturing method of the F4-layer chip varistor is to print and dry a slit precursor base consisting of fired particles, carbon particles, thermoplastic resin, and volatile solvent having the same composition as the varistor composition, and then to form a molded sheet with a slit precursor film formed on the front surface. The prismatic laminate obtained by laminating and heat-pressing a plurality of layers so that the slit precursor films are alternately led out to opposite end faces is gradually heated and sintered at high temperature, and the carbon particles and volatiles of the slit precursor film described in 114 are heated and sintered at a high temperature. A prismatic sintered body with a plurality of columnar ceramic particles formed therein by removing the slag component is obtained.
つぎに該角柱状焼結体の前記スリットの導出端面を除く
外側面を研削して円柱状バリスタ集体を形成し、前記ス
リット導出端面に多孔質外部電極を形成し、しかるのも
該外部電極を通し前記スリット内に溶融金属を圧入し内
部電極を形成したのち前記外部電極に円筒状金属キャッ
プを嵌合することを特徴とするものである。Next, the outer surface of the prismatic sintered body except for the lead-out end face of the slit is ground to form a cylindrical varistor assembly, and a porous external electrode is formed on the slit lead-out end face. The molten metal is press-fitted into the slit through the slit to form an internal electrode, and then a cylindrical metal cap is fitted onto the external electrode.
(作用)
以上の構成によれば、焼結工程筒内部電極が存在しない
ため、バリスタ組成と内部電極材料の相互反応はなく、
使用できるバリスタ組成が限定されることなくバリスタ
組成範囲が拡大される。(Function) According to the above configuration, since there is no internal electrode in the sintering process cylinder, there is no mutual reaction between the varistor composition and the internal electrode material.
The range of varistor compositions is expanded without limiting the varistor compositions that can be used.
また、スリット内に形成される柱状セラミック粒子によ
って成形シート積層間が強固に結合されることになり使
用中にお9ノる熱ストレスによるクラック発生が防止で
きる。さらに内部電極が焼付けでないため内部電極材料
も高価な貴金属に限定することなく、しかもir!温下
で炭化し特性劣化になる有機物を含んだS電塗料を除い
た範囲で内部電極材料の選択が可能で安価な内部電極材
料の使用によって特性劣化することなく、コストダウン
に貢献できる。In addition, the columnar ceramic particles formed in the slits firmly bond the laminated layers of the molded sheets, thereby preventing the occurrence of cracks due to thermal stress during use. Furthermore, since the internal electrodes are not baked, the internal electrode materials are not limited to expensive precious metals, and IR! It is possible to select internal electrode materials within a range other than S-electrode paint, which contains organic matter that carbonizes at high temperatures and deteriorates its characteristics. By using inexpensive internal electrode materials, the characteristics do not deteriorate, contributing to cost reduction.
(実茄例) 以下本発明の一実施例につき詳細に説明する。(Fruit eggplant example) An embodiment of the present invention will be described in detail below.
まず酸化亜鉛を主成分とし、Bi、Pr、La。First, zinc oxide is the main component, followed by Bi, Pr, and La.
Sb、Cr、Mg、Co、〜ln、Niを各々8i
0 、Pr O、La2O3゜Sb O、Cr2
O3、Mob、Coo。8i each of Sb, Cr, Mg, Co, ~ln, and Ni
0, Pr O, La2O3゜Sb O, Cr2
O3, Mob, Coo.
Mno、Ntoに換算して適宜添加してなる仮焼粉体を
水を溶媒としてボールミルで粉砕−混合−乾燥してなる
乾燥粉体にエチルセルローズとトルエンを加えて撹拌−
混合し一様な混合物を得る。その後この混合物の空気を
除去しドクターブレード法でセラミックグリーンシート
を成形し乾燥し、つぎに該成形シート表面に該成形シー
トを構成する組成と同一組成からなり、あらかじめ焼結
された所定の大きざ(5〜100μ)の焼成粒子、カー
ボン粒子、アクリル系の熱可塑性樹脂およびトルエン、
アセトンなどの揮発性溶剤により構成されたスリット前
駆ペーストを印明−乾燥しスリット前駆膜を形成して前
記成形シートを複数積層する。第2図および第3図は該
成形シート1を用い前記スリット前駆膜2が交互に相対
向端面に導出されるよう複@積層し加熱圧着して得た角
柱状8i層体3であり、この場合最下面および最上面と
なる面は間に位aする成形シートより厚いものを用いる
。A calcined powder obtained by adding appropriate amounts in terms of Mno and Nto is ground in a ball mill using water as a solvent.
Mix to obtain a homogeneous mixture. After that, air is removed from this mixture, and a ceramic green sheet is formed by a doctor blade method and dried. Next, a pre-sintered ceramic green sheet of a predetermined size made of the same composition as that of the formed sheet is placed on the surface of the formed sheet. (5 to 100μ) fired particles, carbon particles, acrylic thermoplastic resin and toluene,
A slit precursor paste made of a volatile solvent such as acetone is stamped and dried to form a slit precursor film, and a plurality of the molded sheets are laminated. FIGS. 2 and 3 show a prismatic 8i layered body 3 obtained by laminating and heat-pressing the molded sheet 1 in such a way that the slit precursor films 2 are alternately drawn out to opposite end faces. In this case, the lowermost and uppermost surfaces are thicker than the molded sheet located between them.
つぎに前記角柱状積層体3を10〜b
間の昇温速度で500〜650℃まで昇温し、該昇温湿
度で3.5〜4.5時間保持して前記スリット前駆膜2
を構成するカーボン粒子と揮発性溶剤を分解除去し冷却
後90〜b
時間の昇温速度で1000〜1400℃まで昇温し、該
昇温時間で3.5〜4.5時間焼結しスリット前駆WA
2部に第4図に示すように成形シート1積層間を結合し
た複数のセラミック柱状粒子4を有するスリット5を形
成した角柱状焼結体6を得る。しかして、該角柱状焼結
体6のスリット5が導出りる両端面を除く外側面をたと
えばセンタレス研摩機によって研削し第5図に示すよう
な円柱状バリスタ素体7を得る。Next, the temperature of the prismatic laminate 3 is raised to 500 to 650° C. at a heating rate of 10 to 650° C., and held at this temperature and humidity for 3.5 to 4.5 hours to form the slit precursor film 3.
After cooling, the carbon particles and volatile solvent constituting the carbon particles were decomposed and removed, and after cooling, the temperature was raised to 1000 to 1400 °C at a heating rate of 90 to 1400 °C, and sintered for 3.5 to 4.5 hours at this temperature increase time to form a slit. Precursor WA
As shown in FIG. 4, a prismatic sintered body 6 is obtained in which a slit 5 having a plurality of ceramic columnar particles 4 bonding the laminated layers of the formed sheet 1 is formed in the second part. Then, the outer surface of the prismatic sintered body 6, excluding both end surfaces from which the slits 5 are led out, is ground using, for example, a centerless grinder to obtain a cylindrical varistor body 7 as shown in FIG.
つぎに第6図に示すように該円柱状バリスタ素体7のス
リット5導出両端面にたとえば多孔質銀ペーストを塗布
−乾燥した後500〜650℃にて焼付は連続した細孔
を有する多孔質外部接続用電極8を形成し、しかるのち
Pb、Snのうち少なくとも1種の金属またはPb、S
nのうち少なくとも1種を主成分としてAg。Next, as shown in FIG. 6, a porous silver paste, for example, is applied to both end surfaces of the cylindrical varistor body 7 from which the slit 5 is led out. The external connection electrode 8 is formed, and then at least one metal selected from Pb and Sn or Pb and S is formed.
Ag containing at least one type of n as a main component.
AI! 、Cu、Znのうち少なくとも1種を含む合金
からなり前記成形シート1を構成する最も低い金属酸化
物の融点以下の融点とした溶融金属中に浸漬し、該溶融
金属を入れた容器を減圧し、その後圧力をかけて前記多
孔質外部接続用電極8の細孔を通し前記スリット5内に
前記溶融金属を圧入し、その後徐冷し前記スリット5内
に前記多孔質外部接続用電極8と接続した内部電極9を
形成し、しかるのち第1図に示すように多孔質外部接続
用電極8形成面に円筒状金属キャップ10を嵌合するよ
うにするものである。AI! , Cu, and Zn, and the molded sheet 1 is immersed in a molten metal whose melting point is lower than the melting point of the lowest metal oxide constituting the molded sheet 1, and the container containing the molten metal is depressurized. Then, pressure is applied to press the molten metal into the slit 5 through the pores of the porous external connection electrode 8, and then it is slowly cooled and connected to the porous external connection electrode 8 inside the slit 5. Then, as shown in FIG. 1, a cylindrical metal cap 10 is fitted onto the surface on which the porous external connection electrode 8 is formed.
以上のように構成してなるメルフ型積層チップバリスタ
の製造方法によれば、内部電極9が高温下となる焼結工
程を11ないため、組成と内部電極材料の相互反応の要
因は解消され、使用できるバリスタ組成範囲の制限はな
くどのようなバリスタ組成を用いたものでも所期の特性
を満足できる積層チップバリスタが1qられると同時に
、内部電極材料は1価な負金属に限定されることなく、
しかもa!!温下で炭化し特性劣化になる有機物を含ん
だ導電塗料を除いた範囲で安価な金属の使用が可能とな
り、特性劣化することなく安価な積層チップバリスタが
得られる。According to the manufacturing method of the Melf-type multilayer chip varistor configured as described above, since the sintering step 11 in which the internal electrodes 9 are exposed to high temperatures is not performed, the factor of mutual reaction between the composition and the internal electrode material is eliminated. There is no limit to the range of varistor compositions that can be used, and 1q multilayer chip varistors can be created that can satisfy the desired characteristics no matter what varistor composition is used, and at the same time, the internal electrode material is not limited to monovalent negative metals. ,
And a! ! This makes it possible to use inexpensive metals, except for conductive paints that contain organic matter, which carbonizes at high temperatures and deteriorates the characteristics, making it possible to obtain inexpensive multilayer chip varistors without deteriorating the characteristics.
また焼結体形成過程でスリット前駆膜2を構成するセラ
ミック粒子がセラミック柱状粒子4となり、該柱状粒子
4を介して成形シート11111V!J間が強固に結合
した状態になるため熱ストレスが加えられたとしても内
部電極9マ一ジン部へのクラック発生の危険性はなく、
上記の作用効果と相俟って従来技術で述べたものと比較
して大幅に信頼性が向上する利点を有する。Further, in the process of forming the sintered body, the ceramic particles constituting the slit precursor film 2 become ceramic columnar particles 4, and the formed sheet 11111V! Since J is firmly connected, even if thermal stress is applied, there is no risk of cracking in the internal electrode 9 machine part.
Combined with the above-mentioned effects, the present invention has the advantage that reliability is significantly improved compared to those described in the prior art.
つぎに本発明と従来技術によって得られた参考例との比
較の一例について述べる。Next, an example of comparison between the present invention and a reference example obtained by the prior art will be described.
実施例1
酸化亜鉛を主成分とし、Bi2O3,5b203 、M
QO,Coo、MnO,N i Oを添加した組成から
構成した成形シートを用いてなる本発明Aと該本発明へ
と同一組成からなる成形シートを用い特開昭61−87
313号公報にて開示された技術を適用して得られたバ
リスタからなる参考例Bにおける品持性を調べた結果、
表1に示すようになった。Example 1 Main component is zinc oxide, Bi2O3,5b203, M
Invention A, which uses a molded sheet with a composition containing QO, Coo, MnO, and NiO, and JP-A-61-87, which uses a molded sheet with the same composition.
As a result of examining the quality of Reference Example B consisting of a varistor obtained by applying the technology disclosed in Publication No. 313,
The results are shown in Table 1.
表 1
なお本発明Aにおけるスリット前駆ペーストは26〜3
7μmの焼結粒子10!11r11部、カーボン粒子4
0重同部、アクリル樹脂、トルエン。Table 1 The slit precursor paste in the present invention A is 26 to 3
7μm sintered particles 10!11r11 parts, carbon particles 4
0 parts, acrylic resin, toluene.
フタル酸オクチル総体で50千足部からなるものを用い
、内部電極材はPb70%、5n30%合金を用いた。A total of 50,000 parts of octyl phthalate was used, and the internal electrode material was an alloy of 70% Pb and 30% 5N.
表1から明らかなように、本発明Aは参考例Bと比較し
て非直線特性、LC特性およびυ1限電圧特性のいずれ
も格段にすぐれている。数値は各々30個の平均値であ
る。As is clear from Table 1, Invention A is significantly superior to Reference Example B in all of the nonlinear characteristics, LC characteristics, and υ1 limiting voltage characteristics. Each value is an average of 30 values.
実施例2
上記実施例1で用いたと同一構成からなる本発明Aと、
特開昭56−1501号公報に開示された製法によって
得た参考例CにおけるVlmAの変化率と85℃雰囲気
中でDC最大許容回路電圧を500時間印加したときの
制限電圧特性V2A/V1mA値を比較した結果、第8
図および表2に示すようになった。Example 2 Invention A having the same configuration as used in Example 1 above,
The rate of change in VlmA in Reference Example C obtained by the manufacturing method disclosed in JP-A No. 56-1501 and the limiting voltage characteristic V2A/V1mA value when the DC maximum allowable circuit voltage is applied for 500 hours in an 85°C atmosphere are As a result of the comparison, the 8th
The results are shown in Figure and Table 2.
なお参考例Cにおける組成は本発明と同一のものからな
り、焼失材料はポリビニルアルコールペーストで電極は
導電塗料を用いた。The composition of Reference Example C was the same as that of the present invention, and the burned-out material was polyvinyl alcohol paste, and the electrodes were made of conductive paint.
表 2
第8図および表2から明らかなように参考例Cは制限電
圧特性が極度に悪く、かつ信頼性も劣り本発明の優位性
を実訂した。Table 2 As is clear from FIG. 8 and Table 2, Reference Example C had extremely poor limiting voltage characteristics and poor reliability, which overshadowed the superiority of the present invention.
上記実施例ではバリスタ組成として酸化亜鉛を主成分と
するものを例示して説明したが、他の金属酸化物を主成
分としたものに適用でさることは言うまでもない。In the above embodiments, a varistor composition mainly composed of zinc oxide has been exemplified and explained, but it goes without saying that the present invention can also be applied to a varistor composition mainly composed of other metal oxides.
また、上記実施例では積層するスリット前駆膜2の幅を
同一としたものを例示して説明したが、第7図に示すよ
うに積層して埋設されるスリット前駆1!12の幅を中
心部を広く、外側に向こうに従って狭くなるように設は
研削しろを少なくするように設定すれば内部′Fi極の
数を多くできるので、小形でサージ耐量の大きなものを
得ることができることは勿論である。Further, in the above embodiment, the width of the stacked slit precursor films 2 is the same, but as shown in FIG. By setting it so that it is wide and narrowing toward the outside and reducing the grinding allowance, it is possible to increase the number of internal 'Fi poles, so of course it is possible to obtain a small size and a large surge withstand capacity. .
以上述べたように本発明によれば、バリスタ組成に関係
なく特性劣化なく、かつコストダウンに貢献できる実用
的価値の高いメルフ型l?1層チップバリスタの製造方
法を提供できる。As described above, according to the present invention, the Melf-type l? A method for manufacturing a single-layer chip varistor can be provided.
第1図〜第7図は本発明の一実施例に係るメルク型積層
チップバリスタの製造方法を説明するためのもので、第
1図はメルフ型積層チップバリスタを示す拡大正断面図
、第2図および第3図は角柱状積層体を示すもので第2
図は斜視図、第3図は第2図イーイ拡大正断面図、第4
図はスリットを形成した角柱状焼結体を示す拡大正断面
図、第5図は円柱状バリスタ素体を示す斜視図、第6図
は円柱状バリスタ素体のスリット導出端面に多孔質外部
接続用電極をスリット内に内部電極を形成した状態を示
す拡大正断面図、第7図は本発明の他の実施例に係るメ
ルフ型積層チップバリスタの製造方法を説明するための
もので角柱状V4層体を示す斜視図、第8図は時間−V
lmAの変化率特性曲線図である。
1・・・・・・成形シート
2・・・・・・スリット前駆膜
3・・・・・・角柱状la層体
4・・・・・・セラミック柱状粒子
5・・・・・・スリット
6・・・・・・角柱状焼結体
7・・・・・・円柱状バリスタ素体
8・・・・・・多孔質外部接続用電極
9・・・・・・内部電極
10・・・・・・円筒状金属キャップ
特 許 出 願 人
マルコン電子株式会社
8多孔質外部接続用電陽
角柱状焼結体の拡大正断面図
第 4 図
第 6 図
時間(h)
第 8 図1 to 7 are for explaining a method of manufacturing a Melk-type multilayer chip varistor according to an embodiment of the present invention, FIG. 1 is an enlarged front cross-sectional view showing a Melk-type multilayer chip varistor, Figures 2 and 3 show a prismatic laminate.
The figure is a perspective view, Figure 3 is an enlarged front sectional view of Figure 2, and Figure 4 is an enlarged front sectional view of Figure 2.
The figure is an enlarged front cross-sectional view showing a prismatic sintered body with a slit formed therein, Figure 5 is a perspective view showing a cylindrical varistor body, and Figure 6 is a porous external connection to the slit lead-out end face of the cylindrical varistor body. FIG. 7 is an enlarged front cross-sectional view showing a state in which internal electrodes are formed in slits, and FIG. A perspective view showing the layered body, FIG. 8 is a time-V
FIG. 3 is a diagram showing a characteristic curve of change rate of lmA. 1... Molded sheet 2... Slit precursor film 3... Prismatic LA layer body 4... Ceramic columnar particles 5... Slit 6 ...Prismatic sintered body 7 ...Cylindrical varistor element body 8 ...Porous external connection electrode 9 ...Internal electrode 10 ... ...Patent application for cylindrical metal cap Hito Marukon Electronics Co., Ltd. 8 Enlarged front cross-sectional view of a prismatic sintered body for porous external connection Figure 4 Figure 6 Time (h) Figure 8
Claims (1)
を乾燥して得た成形シート上に該成形シートを構成する
組成と同一組成の焼成粒子とカーボン粒子と熱可塑性樹
脂および揮発性溶剤、からなるスリット前駆ペーストを
印刷−乾燥しスリット前駆膜を形成する手段と、該スリ
ット前駆膜が交互に相対向端面に導出するよう前記成形
シート複数積層−加熱圧着し角柱状積層体を得る手段と
、該角柱状積層体を徐々に昇温し、かつ高温焼結によつ
て前記スリット前駆膜を構成するカーボン粒子および揮
発成分を除去しこの部分に複数のセラミック柱状粒子を
有するスリットを形成した角柱状焼結体を得る手段と、
該角柱状焼結体の前記スリット導出端面を除く外側面を
研削し円柱状バリスタ素体を得る手段と、該素体のスリ
ット導出端面に連続した細孔を有する多孔質外部接続用
電極を形成する手段と、該多孔質外部接続用電極を通し
前記スリット内に溶融金属を圧入し内部電極を形成する
手段と、前記多孔質外部接続用電極形成面に円筒状金属
キャップを嵌合する手段とを具備したことを特徴とする
メルフ型積層チップバリスタの製造方法。A slit precursor made of fired particles having the same composition as that of the molded sheet, carbon particles, a thermoplastic resin, and a volatile solvent is placed on a molded sheet obtained by drying a ceramic green sheet containing metal oxide as a main component. means for printing and drying the paste to form a slit precursor film; means for laminating and heat-pressing a plurality of the molded sheets so that the slit precursor films are alternately led out to opposite end faces to obtain a prismatic laminate; A prismatic sintered body in which the temperature of the laminate is gradually raised and the carbon particles and volatile components constituting the slit precursor film are removed by high-temperature sintering, and slits having a plurality of ceramic columnar particles are formed in this part. a means of obtaining
A means for obtaining a cylindrical varistor element body by grinding the outer surface of the prismatic sintered body except for the slit lead-out end face, and a porous external connection electrode having continuous pores on the slit lead-out end face of the element body. means for press-fitting molten metal into the slit through the porous external connection electrode to form an internal electrode; and means for fitting a cylindrical metal cap onto the porous external connection electrode forming surface. A method for manufacturing a Melf-type multilayer chip varistor, characterized by comprising:
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP61246600A JPS63100701A (en) | 1986-10-16 | 1986-10-16 | Manufacture of melf type laminated chip varistor |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP61246600A JPS63100701A (en) | 1986-10-16 | 1986-10-16 | Manufacture of melf type laminated chip varistor |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPS63100701A true JPS63100701A (en) | 1988-05-02 |
Family
ID=17150823
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP61246600A Pending JPS63100701A (en) | 1986-10-16 | 1986-10-16 | Manufacture of melf type laminated chip varistor |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS63100701A (en) |
-
1986
- 1986-10-16 JP JP61246600A patent/JPS63100701A/en active Pending
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