JPS63102334U - - Google Patents
Info
- Publication number
- JPS63102334U JPS63102334U JP19780286U JP19780286U JPS63102334U JP S63102334 U JPS63102334 U JP S63102334U JP 19780286 U JP19780286 U JP 19780286U JP 19780286 U JP19780286 U JP 19780286U JP S63102334 U JPS63102334 U JP S63102334U
- Authority
- JP
- Japan
- Prior art keywords
- circuit
- terminal
- power supply
- ground
- output terminal
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 230000003287 optical effect Effects 0.000 claims description 3
- 238000010586 diagram Methods 0.000 description 5
- 230000008878 coupling Effects 0.000 description 2
- 238000010168 coupling process Methods 0.000 description 2
- 238000005859 coupling reaction Methods 0.000 description 2
- 239000003990 capacitor Substances 0.000 description 1
Landscapes
- Electronic Switches (AREA)
Description
第1図は本考案の1実施例のフローテイング・
スイツチ回路の回路ブロツク図。第2図は第1図
のスイツチ素子の別の実施例の回路図。第3図は
接地電源を含む第1図の安定化電源回路B1の回
路図。第4図は第1図の光結合回路B2、スイツ
チSW1、NPNトランジスタTR1を含む回路
図。第5図は多数のスイツチを並列接続した本考
案の別の実施例の回路図。
1:入力端子;2:出力端子;TR1〜TRn
:NPNトランジスタ;FD:フローテイング駆
動回路;B1:安定化電源回路;B2:光結合回
路;a・b・c・d・e・f・j:端子;g:フ
ローテイング・グランド端子;T1:トランス;
PS:接地電源;SS:制御信号源;G:接地;
R1,R1a,R1b,Rd1,Rd2,R2,
〜,R9,Rs1,……,Rsn,RL:抵抗;
TR1a,TR1b:トランジスタ対;SG:信
号源、D1a,…D1d,D1,…,D6:ダイ
オード;C1,C2,C3:コンデンサ;ZD1
,ZD2:ツエナダイオード;REG:三端子レ
ギユレータ;U1,U2:オープンコレクタ増幅
器;TRa,TRb:トランジスタ;V1,V2
,V3,VCC:電源端子。
Figure 1 shows the floating structure of one embodiment of the present invention.
Circuit block diagram of a switch circuit. FIG. 2 is a circuit diagram of another embodiment of the switch element shown in FIG. 1. FIG. 3 is a circuit diagram of the stabilized power supply circuit B1 of FIG. 1 including a ground power supply. FIG. 4 is a circuit diagram including the optical coupling circuit B2, switch SW1, and NPN transistor TR1 shown in FIG. FIG. 5 is a circuit diagram of another embodiment of the present invention in which a large number of switches are connected in parallel. 1: Input terminal; 2: Output terminal; TR1 to TRn
: NPN transistor; FD: floating drive circuit; B1: stabilized power supply circuit; B2: optical coupling circuit; a, b, c, d, e, f, j: terminal; g: floating ground terminal; T1: Trance;
PS: Ground power supply; SS: Control signal source; G: Ground;
R1, R1a, R1b, Rd1, Rd2, R 2 ,
~, R 9 , Rs 1 , ..., Rsn, RL: resistance;
TR1a, TR1b: transistor pair; SG: signal source, D1a,...D1d, D1,..., D6: diode; C1 , C2 , C3 : capacitor; ZD1
, ZD2: Zener diode; REG: three-terminal regulator; U1, U2: open collector amplifier; TRa, TRb: transistor; V 1 , V 2
, V 3 , VCC: power supply terminal.
Claims (1)
源電力をトランスを介して受電し、その動作制御
を光信号入力によつて行うようにしたフローテイ
ング・スイツチ回路。 A floating switch circuit that has an input terminal, an output terminal, and a drive circuit, receives power from the power source through a transformer, and controls its operation by inputting an optical signal.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP19780286U JPS63102334U (en) | 1986-12-23 | 1986-12-23 |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP19780286U JPS63102334U (en) | 1986-12-23 | 1986-12-23 |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPS63102334U true JPS63102334U (en) | 1988-07-04 |
Family
ID=31157899
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP19780286U Pending JPS63102334U (en) | 1986-12-23 | 1986-12-23 |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS63102334U (en) |
Citations (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS58142627A (en) * | 1982-02-18 | 1983-08-24 | Toshiba Corp | Gate circuit of self arc extinction type semiconductor element |
| JPS5843042B2 (en) * | 1977-06-24 | 1983-09-24 | 小橋工業株式会社 | Cultivating claws |
-
1986
- 1986-12-23 JP JP19780286U patent/JPS63102334U/ja active Pending
Patent Citations (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS5843042B2 (en) * | 1977-06-24 | 1983-09-24 | 小橋工業株式会社 | Cultivating claws |
| JPS58142627A (en) * | 1982-02-18 | 1983-08-24 | Toshiba Corp | Gate circuit of self arc extinction type semiconductor element |