JPS63142964U - - Google Patents
Info
- Publication number
- JPS63142964U JPS63142964U JP3531587U JP3531587U JPS63142964U JP S63142964 U JPS63142964 U JP S63142964U JP 3531587 U JP3531587 U JP 3531587U JP 3531587 U JP3531587 U JP 3531587U JP S63142964 U JPS63142964 U JP S63142964U
- Authority
- JP
- Japan
- Prior art keywords
- connection end
- antenna connection
- out plugs
- antenna
- tuner
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 238000010586 diagram Methods 0.000 description 4
Description
第１図はこの考案の一実施例の電気的構成を示
すブロツク図、第２図はこの考案の他の実施例の
電気的構成を示すブロツク図、第３図〜第５図は
各々この考案によるアンテナ入力回路を内蔵した
一体型高周波モジユレータの機械的構成例を示す
斜視図、第６図は一体型高周波モジユレータの機
械的構成例をさらに詳細に示した斜視図、第７図
は従来のＶＴＲにモニタテレビを接続した構成を
示すブロツク図、第８図は第７図の構成にチユー
ナユニツトを加えた構成を示すブロツク図である
。
３……分配器、１５……分配器、Ｔａ……アン
テナ入力接栓、Ｔｔ１，Ｔｔ２……チユーナアウ
ト接栓。
Figure 1 is a block diagram showing the electrical configuration of one embodiment of this invention, Figure 2 is a block diagram showing the electrical configuration of another embodiment of this invention, and Figures 3 to 5 are each of this invention. FIG. 6 is a perspective view showing an example of the mechanical structure of an integrated high-frequency modulator with a built-in antenna input circuit, FIG. 6 is a perspective view showing a more detailed example of the mechanical structure of the integrated high-frequency modulator, and FIG. FIG. 8 is a block diagram showing a configuration in which a monitor television is connected to the device, and FIG. 8 is a block diagram showing a configuration in which a tuner unit is added to the configuration in FIG. 3...Distributor, 15...Distributor, Ta...Antenna input connector, Tt1, Tt2...Tuner out connector.
Claims (1)
ト接栓と、前記アンテナ接続端に得られる信号を
前記第１、第２のチユーナアウト接栓へ分配する
分配手段とを具備してなるビデオテープレコーダ
のアンテナ入力回路。 A video tape recorder comprising an antenna connection end, first and second tuner out plugs, and distribution means for distributing a signal obtained at the antenna connection end to the first and second tuner out plugs. Antenna input circuit.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP3531587U JPS63142964U (en) | 1987-03-11 | 1987-03-11 |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP3531587U JPS63142964U (en) | 1987-03-11 | 1987-03-11 |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPS63142964U true JPS63142964U (en) | 1988-09-20 |
Family
ID=30844696
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP3531587U Pending JPS63142964U (en) | 1987-03-11 | 1987-03-11 |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS63142964U (en) |
-
1987
- 1987-03-11 JP JP3531587U patent/JPS63142964U/ja active Pending
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