JPS63158100U - - Google Patents
Info
- Publication number
- JPS63158100U JPS63158100U JP5203087U JP5203087U JPS63158100U JP S63158100 U JPS63158100 U JP S63158100U JP 5203087 U JP5203087 U JP 5203087U JP 5203087 U JP5203087 U JP 5203087U JP S63158100 U JPS63158100 U JP S63158100U
- Authority
- JP
- Japan
- Prior art keywords
- signal
- addition means
- sum
- addition
- phase
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 230000010363 phase shift Effects 0.000 claims description 2
- 230000005236 sound signal Effects 0.000 claims 5
- 238000010586 diagram Methods 0.000 description 5
- 239000011159 matrix material Substances 0.000 description 1
Description
第1図はこの考案の実施例の構成を示すブロツ
ク図、第2図はおなじく実施例の具体的な電気回
路図、第3図は他の実施例の構成を示すブロツク
図、第4図は従来例の構成を示すブツク図である
。
1……マトリクス回路、2,5,6……ミツク
ス回路、4……ローパスフイルタ、7,8……移
相回路。
Figure 1 is a block diagram showing the configuration of an embodiment of this invention, Figure 2 is a specific electric circuit diagram of the embodiment, Figure 3 is a block diagram showing the configuration of another embodiment, and Figure 4 is a block diagram showing the configuration of another embodiment. FIG. 2 is a book diagram showing the configuration of a conventional example. 1... Matrix circuit, 2, 5, 6... Mixing circuit, 4... Low pass filter, 7, 8... Phase shift circuit.
Claims (1)
と、前記2つの異なる音声信号の一方の音声信号
から他方の音声信号を減算する減算手段と、前記
一方の音声信号と第1加算手段から出力される和
信号とを加算する第2加算手段と、前記他方の音
声信号と前記和信号とを加算する第3加算手段と
、前記第1加算手段から出力される和信号のうち
所定周波数以下の信号のみを通過させるフイルタ
手段と、前記差信号と前記フイルタ手段から出力
される低域信号とを加算する第4加算手段と、前
記第4加算手段の出力信号を所定の位相進める第
1移相手段と所定の位相遅らせる第2移相手段と
を備えたことを特徴とする擬似サラウンド装置。 a first addition means for adding two different audio signals; a subtraction means for subtracting one of the two different audio signals from the other audio signal; a second addition means for adding the sum signal of the other audio signal and the sum signal; a third addition means for adding the other audio signal and the sum signal; and a signal having a predetermined frequency or less among the sum signals outputted from the first addition means. filter means for only passing the signal; fourth addition means for adding the difference signal and the low-frequency signal output from the filter means; and first phase shift means for advancing the output signal of the fourth addition means by a predetermined phase. and second phase shifting means for delaying a predetermined phase.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP5203087U JPS63158100U (en) | 1987-04-06 | 1987-04-06 |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP5203087U JPS63158100U (en) | 1987-04-06 | 1987-04-06 |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPS63158100U true JPS63158100U (en) | 1988-10-17 |
Family
ID=30876836
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP5203087U Pending JPS63158100U (en) | 1987-04-06 | 1987-04-06 |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS63158100U (en) |
-
1987
- 1987-04-06 JP JP5203087U patent/JPS63158100U/ja active Pending
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