JPS63163473U - - Google Patents
Info
- Publication number
- JPS63163473U JPS63163473U JP2311887U JP2311887U JPS63163473U JP S63163473 U JPS63163473 U JP S63163473U JP 2311887 U JP2311887 U JP 2311887U JP 2311887 U JP2311887 U JP 2311887U JP S63163473 U JPS63163473 U JP S63163473U
- Authority
- JP
- Japan
- Prior art keywords
- cfar
- signal
- false alarm
- alarm rate
- size
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 238000001514 detection method Methods 0.000 claims description 4
- 238000000034 method Methods 0.000 claims description 2
- 238000010586 diagram Methods 0.000 description 7
- 230000005540 biological transmission Effects 0.000 description 1
- 230000010354 integration Effects 0.000 description 1
Landscapes
- Radar Systems Or Details Thereof (AREA)
Description
第１図はこの考案の一実施例によるＣＦＡＲサ
イズ制御器を備えたＣＦＡＲ検出器を有するレー
ダ装置のブロツク図、第２図はＣＦＡＲ検出器の
機能を説明したブロツク図、第３図はビデオ積分
後のドプラ周波数軸上の波形の説明図、第４図は
誤警報率と分解能の説明図、第５図は従来のレー
ダ装置のブロツク図、第６図は本考案の他の実施
例によるＣＦＡＲ検出器の機能ブロツク図である
。
１……アンテナ、２……送受切り換え器、３…
…送信機、４……受信機、５……信号処理器、６
……Ａ／Ｄ変換器、７……ドプラフイルタ、８…
…ビデオ積分器、９……ＣＦＡＲ検出器、１０…
…指示器、１１……目標識別器、１２……ＣＦＡ
Ｒサイズ制御器。なお図中同一符号は同一又は相
当部分を示す。
Fig. 1 is a block diagram of a radar device having a CFAR detector equipped with a CFAR size controller according to an embodiment of this invention, Fig. 2 is a block diagram explaining the function of the CFAR detector, and Fig. 3 is a video integration diagram. 4 is an explanatory diagram of the waveform on the Doppler frequency axis, FIG. 4 is an explanatory diagram of the false alarm rate and resolution, FIG. 5 is a block diagram of a conventional radar device, and FIG. 6 is a CFAR according to another embodiment of the present invention. FIG. 3 is a functional block diagram of the detector. 1...Antenna, 2...Transmission/reception switch, 3...
...Transmitter, 4...Receiver, 5...Signal processor, 6
...A/D converter, 7...Doppler filter, 8...
...Video integrator, 9...CFAR detector, 10...
...Indicator, 11...Target identifier, 12...CFA
R size controller. Note that the same reference numerals in the figures indicate the same or equivalent parts.
補正 昭６３．４．３０
実用新案登録請求の範囲を次のように補正する
。Amendment April 30, 1983 The scope of claims for utility model registration is amended as follows.
【実用新案登録請求の範囲】
目標検出のために一定誤警報率検出処理を行う
信号処理器を有するレーダ装置において、
上記信号処理器は、
受信機が出力したアナログビデオ信号をデイジ
タル信号に変換するＡ／Ｄ変換器と、
高速フーリエ変換手段からなるドプラフイルタ
と、
該ドプラフイルタの出力を積分して該出力信号
のＳ／Ｎを改善するビデオ積分器と、
受信信号から検出すべき目標の種類を識別する
目標識別器と、
該目標識別器からのデータに応じてＣＦＡＲサ
イズを選択するためのＣＦＡＲサイズ制御器と、
誤ＣＦＡＲサイズ制御器からの制御信号により
設定される所定のＣＦＡＲサイズでＣＦＡＲ処理
し、検出ヒツトを出力するＣＦＡＲ検出器とを備
えたことを特徴とするレーダ装置。[Claim for Utility Model Registration] In a radar device having a signal processor that performs constant false alarm rate detection processing for target detection, the signal processor converts an analog video signal outputted by a receiver into a digital signal. An A/D converter, a Doppler filter consisting of fast Fourier transform means, a video integrator that integrates the output of the Doppler filter to improve the S/N of the output signal, and a type of target to be detected from the received signal. a CFAR size controller for selecting a CFAR size according to data from the target discriminator; and a CFAR size controller for selecting a CFAR size according to the data from the target discriminator; A radar device comprising a CFAR detector that processes and outputs detected hits.
Claims (1)
信号処理器を有するレーダ装置において、 上記信号処理器は、 受信機が出力したアナログビデオ信号をデイジ
タル信号に変換するＡ／Ｄ変換器と、 高速フーリエ変換手段からなるドプラフイルタ
と、 該ドプラフイルタの出力を積分して該出力信号
のＳ／Ｎを改善するビデオ積分器と、 受信信号から検出すべき目標の種類を識別する
目標識別器と、 該目標識別器からのデータに応じて一定誤警報
率サイズを選択するためのＣＦＡＲサイズ制御器
と、 該ＣＦＡＲサイズ制御器からの制御信号により
設定される所定の一定誤警報率サイズでＣＦＡＲ
処理し、検出ヒツトを出力するＣＦＡＲ検出器と
を備えたことを特徴とするレーダ装置。[Claim for Utility Model Registration] In a radar device having a signal processor that performs constant false alarm rate detection processing for target detection, the signal processor converts an analog video signal outputted by a receiver into a digital signal. An A/D converter, a Doppler filter consisting of fast Fourier transform means, a video integrator that integrates the output of the Doppler filter to improve the S/N of the output signal, and a type of target to be detected from the received signal. a CFAR size controller for selecting a constant false alarm rate size in response to data from the target discriminator; and a predetermined constant false alarm rate size set by a control signal from the CFAR size controller. CFAR with false alarm rate size
A radar device comprising a CFAR detector that processes and outputs detected hits.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP2311887U JPS63163473U (en) | 1987-02-18 | 1987-02-18 |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP2311887U JPS63163473U (en) | 1987-02-18 | 1987-02-18 |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPS63163473U true JPS63163473U (en) | 1988-10-25 |
Family
ID=30821143
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP2311887U Pending JPS63163473U (en) | 1987-02-18 | 1987-02-18 |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS63163473U (en) |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2011153958A (en) * | 2010-01-28 | 2011-08-11 | Japan Radio Co Ltd | Radar signal processing apparatus |
-
1987
- 1987-02-18 JP JP2311887U patent/JPS63163473U/ja active Pending
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2011153958A (en) * | 2010-01-28 | 2011-08-11 | Japan Radio Co Ltd | Radar signal processing apparatus |
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