JPS63166221A - Manufacturing method of semiconductor device - Google Patents

Abstract

(57) [Summary] This bulletin contains application data before electronic filing, so abstract data is not recorded.

Description

[Detailed description of the invention] [Industrial application field] The present invention relates to a method of manufacturing a semiconductor device.

[Conventional technology]

FIG. 3 is a cross-sectional view showing a conventional example of a process for manufacturing a MOS transistor using the ion implantation method.

In the figure, 1 is a silicon substrate, and a gate electrode 3 is formed on a part of its surface with a thin oxide film 2 interposed therebetween. Next, source/drain regions 4 are formed in the long silicon plate 1 in a self-aligned manner with the gate electrode 3 by ion implantation.

In the figure, numeral 5 indicates the ion flow of ion implantation.

[Problem that the invention seeks to solve]

Ion implantation in the conventional example described above is carried out by using an ion implantation device and accelerating ionized impurities by an electric field and projecting them onto the silicon substrate 1 as an ion stream 5. The greater the ion energy accelerated at this time, the deeper the doping depth of the source/drain region 4 formed in the silicon substrate 1, and the more the implanted ions scatter in the lateral direction (that is, below the gate electrode 3). The degree also increases. For this reason, especially when trying to increase the degree of integration by forming a short gate length, it is necessary to perform ion implantation after reducing the ion energy sufficiently, and if this is insufficient, the resulting Pulse death through occurs in the MOS transistor, resulting in the problem that a semiconductor device with a high degree of integration cannot be obtained. However, when the accelerating voltage is lowered to reduce the ion energy,
As the ion current decreases, the amount of ion irradiation per unit time decreases, and it takes much time to dope to a predetermined concentration, resulting in poor productivity.

This invention was made to solve these problems, and by effectively reducing the ion energy without reducing the ion irradiation dose, it is possible to perform doping at a predetermined concentration by short-time ion implantation. It is an object of the present invention to provide a method for manufacturing a semiconductor device in which the doping depth can be suppressed to a shallow level, the wraparound of implanted ions in the lateral direction can be reduced, and the degree of integration can be increased without causing parti-through. .

[Means for solving problems]

A method for manufacturing a semiconductor device according to the present invention performs ion implantation while supplying a gas flow to the surface of a semiconductor substrate.

(Function) During ion implantation, the ions incident on the surface of the semiconductor substrate are scattered and attenuated by the gas flow, so the ion energy is effectively reduced. Since the lateral spread of ions is suppressed to a small extent and most of the scattered and attenuated ions are incident on the semiconductor substrate surface, the amount of ion irradiation does not decrease, and it takes only a short time to obtain a predetermined doping concentration.

〔Example〕

FIG. 1 is a cross-sectional view showing the steps of an embodiment of the method for manufacturing a semiconductor device according to the present invention.
The manufacturing process of the transistor is shown, and the manufacturing is performed by the following steps.

First, a thin oxide film 2 is formed on a part of the surface of a silicon substrate 1, which is a semiconductor substrate, and a gate electrode 3 is further formed through this oxide film 2.

Next, ion implantation is performed at a relatively high accelerating voltage while flowing a gas onto the surface of the silicon substrate 1, whereby source/drain regions Vi4 are formed in the silicon substrate 1 in a form that is self-aligned with the gate electrode 3. It is formed. In the same figure,
5 shows the ion flow of ion implantation, and 6 shows the gas flow. In this process, the relatively high-energy ion stream 5 is scattered and attenuated by the gas stream 6, so that the energy of the ion stream 5 is effectively reduced, resulting in the formation of a doping depth, i.e., in the silicon substrate 1. The source/drain regions 4 to be formed are shallow. Further, since the lateral direction, that is, the wraparound of the implanted ions below the gate electrode 3 is reduced, the area where the source/drain region 4 and the gate electrode 3 overlap is reduced. Furthermore, since most of the scattered and attenuated ions are incident on the surface of the silicon substrate 1, the ion irradiation dose does not decrease and it takes only a short time to obtain a predetermined doping concentration.

From this, in manufacturing this MOS transistor, a short ion implantation process can be performed without causing bunch-through.
Furthermore, the gate length can be made sufficiently short, and therefore the degree of integration can be greatly increased without impairing productivity.

The gas flow 6 is preferably one of the same type as the ions to be implanted, but it is not always easy to obtain the gaseous state, so in that case, an inert gas such as argon may be used. Since the kinetic energy given during scattering is small, it can be considered that inert gas is almost never injected into the silicon substrate 1. However, even if a small amount of inert gas is injected, it is inert and may affect the characteristics of the semiconductor device. It has no effect.

Although FIG. 1 shows a case where a single material is used as the gate electrode 3, the gate electrode 3 is not limited to this, and as shown in FIG. The method of manufacturing a semiconductor device according to the present invention can be similarly applied to the case where a semiconductor device (gate, etc.) is used. Further, in the above embodiment, the case where the silicon substrate 1 is used as the semiconductor substrate has been described, but the present invention is also applicable to the case where a compound semiconductor substrate or other semiconductor substrate is used.

(Effects of the Invention) As described above, according to the present invention, ion energy can be effectively reduced without reducing the ion irradiation dose, doping can be performed at a predetermined concentration by short-time ion implantation, and the doping depth can be The wraparound of implanted ions in both the vertical and lateral directions is suppressed to a small extent, which allows for example
Even when the gate length is shortened in the manufacture of a transistor, punch-through does not occur and a semiconductor device with a high degree of integration can be obtained without deteriorating productivity.

[Brief explanation of the drawing]

FIG. 1 is a cross-sectional view showing the steps of one embodiment of the method for manufacturing a semiconductor device according to the present invention, FIG. 2 is a cross-sectional view showing the steps of another embodiment, and FIG. 3 is a cross-sectional view showing the steps of a conventional example. It is. In the figure, 1 is a semiconductor substrate, 5 is an ion flow, and 6 is a gas flow. Note that the same reference numerals in each figure indicate the same or corresponding parts. Agent Masu Oiwa Figure 2 ↓↓↓↓↓1↓To5 ↓↓↓↓↓↓↓↓～5 Figure 1 1; Key guide Ki Motoki (59 Kong Kishu) 5: Aeon Meetane 6: Power “°S 5/ILJ

Claims (3)

[Claims] (1) A method for manufacturing a semiconductor device, characterized in that ion implantation is performed while supplying a gas flow to the surface of a semiconductor substrate. (2) The method of manufacturing a semiconductor device according to claim 1, wherein the gas flow is made of an inert gas. (3) The method of manufacturing a semiconductor device according to claim 1, wherein the gas flow is made of the same type of gas as the ions to be implanted.