JPS63169015A - Manufacture of laminated ceramic chip capacitor - Google Patents

Abstract

(57) [Summary] This bulletin contains application data before electronic filing, so abstract data is not recorded.

Description

DETAILED DESCRIPTION OF THE INVENTION [Industrial Field of Application] The present invention relates to a method for manufacturing a chip capacitor, particularly a multilayer ceramic chip capacitor.

[Conventional technology]

In recent years, as the demand for lighter, thinner, shorter, and higher performance electronic devices has increased, leadless chip components have come to be used in many electronic devices, playing a major role in increasing the density of electronic devices. There is.

Under these circumstances, demand for chip capacitors, especially multilayer ceramic chip capacitors, is rapidly increasing in the vicinity of Jα, and they are now being used in a wide range of electronic devices.

A cross-sectional view of such a multilayer ceramic chip capacitor is shown in FIG. In FIG. 2, 1 is a ceramic dielectric layer, 2 is an internal electrode layer, and 3 is an external electrode.

Such multilayer ceramic chip capacitors are manufactured using conventional methods.

For example, a mixture is prepared by kneading a ceramic dielectric material such as barium titanate and a binder material such as butyral resin, and this mixture is formed into a sheet to form a so-called green sheet.

Next, a conductive paste made of a noble metal such as palladium or platinum is coated on one main surface of the green sheet by screen printing to form a plurality of internal electrode layers in the required pattern. After laminating the required number of green sheets, the green sheet laminate is cut into solid pieces.1 The obtained solid green sheet laminate is sintered at a high temperature of, for example, 1200 to 1300°C to form solid pieces. make ceramic capacitor elements.

Next, silver or silver-palladium-based isoelectric paste is selectively applied to both opposing ends of the ceramic capacitor element where the internal electrode layers are exposed, and the temperature is increased to 800 to 900°C.
The external electrode terminal is formed by sintering at a temperature of .

[Problem that the invention seeks to solve]

÷+! of the conventional multilayer ceramic chip capacitor mentioned above! In the manufacturing method, when forming the internal electrode layer, a conductive paste of noble metal such as palladium or platinum is applied and formed by screen printing method. It is technically extremely difficult to control the thickness of the electrode thinly and uniformly, and the current limit is a thickness of about 5μ.Therefore, it is necessary to use the noble metals mentioned above as the material for forming the internal electrode layer. Therefore, a thick internal electrode layer is economically problematic in terms of cost, and it is desired to make it even thinner.

Furthermore, as mentioned above, due to the screen printing method used, there is a limit to how thin the green sheets that make up the ceramic dielectric can be formed, especially when laminating them to make a large capacity capacitor. There was an inconvenience that it was difficult to ensure reliability in terms of pressure resistance.

Therefore, an object of the present invention is to solve the above-mentioned problems, and to provide a method that allows the internal electrodes 11.1 to be formed thinly and uniformly, and that allows a ceramic chip capacitor with a high capacity of 11'1 layer % to be made with IIQ i:2. It is about providing.

[Flat membrane to solve problems]

The present invention involves a process of forming a green sheet by kneading a mixture of a ceramic dielectric material and a water-insoluble resin binder material, and forming a plurality of internal electrode layers on one main surface of the green sheet. step, laminating the required number of green sheets, and then cutting the green sheet 8' into solid pieces (cutting the footwear body; sintering the obtained solid piece green sheet laminate; The step of forming external electrode terminals on the opposite ends of exposed internal electrode layers of the shaped sintered body is an electroless plating method. This is a method for manufacturing a multilayer ceramic chip capacitor in which a conductive metal layer is selectively formed.

In the method described above, except for the step of forming the internal electrode layer used in the present invention, other steps can be performed in the same manner as in conventional methods.

[For production]

According to the method of the present invention, the internal electrode layer can be formed very thinly and uniformly on the surface of the green sheet, and thus on the surface of the ceramic dielectric layer, thereby reducing the amount of internal electrode layer material used and making it economical. It is possible to make a compact ceramic chip capacitor with a large chamber A and a single-layer ceramic chip capacitor.

〔Example〕

An embodiment of the present invention will be described below with reference to the drawings.

FIGS. 1A to 1D are explanatory diagrams of the manufacturing process of a bond type ceramic chip capacitor according to an embodiment of the present invention.

In this example, first, as shown in FIG. 1A, fine powder of a dielectric ceramic material made of barium titanate or titanium oxide is dispersed in a water-insoluble resin such as butyral resin, and this is mixed to form a mixture. A so-called green sheet 4 for forming a ceramic dielectric layer 4 shown in the first figure was prepared by molding the mixture into a sheet.

Next, this green sheet 4 is subjected to activation treatment, and according to the present invention, #:N'ri
A conductive metal is deposited on the activated area by selectively adhering, for example, a fine particle nucleus of metallic palladium, which will become a catalyst nucleus, and then immersed in an electroless plating solution. An internal electrode layer was formed in a pattern.

To explain this step in more detail, the above activation process needs to be performed only on the desired interior and on the green sheet 4 where the electrode layer 5 is to be formed. For this reason, in this example, the other surface of the green sheet 4, that is, the surface on which the internal electrode layer is not formed, is entirely covered with a polyester film to prevent the activation layer from adhering, and is covered with a polyester film. On the other side, that is, the side on which the internal electrode layer 5 is to be formed, apply an activation treatment solution such as a colloidal solution of palladium by a stamping method or a printing method to detect only the part where the desired internal electrode layer 5 is to be formed. It was done by

Next, the internal mold W4Fj5 is deposited and formed by electroless plating, and the conductive metal layer deposited by this electroless plating method is made at It must be made of metal.For this reason, barium titanate or titanium oxide was used as the ceramic material in this example, so a metal that can withstand the sintering temperature of 1200 to 1300°C was used (palladium or its alloy). An electroless plating solution containing .

The composition of the palladium electroless plating bath used in this example is shown below.

PdCj, 0.01 not/
7NH40H (28% aqueous solution) 20
0m (/J Chiog! J Call t*
20w/INaHtPO*
Add water to 0.05 mol/1 of the above ingredients to make the total volume f
llll.

The ceramic green sheet 4 that had been activated as described above was immersed at a temperature of 40° C., and then washed with water.

Next, as described above, electroless plating of palladium is performed to form the internal electrode layer 5 of metal palladium on the surface of the ceramic green sheet 4.The required number of green sheets 4 is determined so as to obtain a capacitor of the intended capacitance. As shown in Figure 1B, the sheets are laminated (four sheets are shown in the figure), and one green sheet (not shown) with no internal electrode layer formed on the top layer is electrically connected and a press is used. It was integrally compression molded. At this time, when it is later cut into solid pieces, it is necessary to alternately expose every other internal electrode layer 5 at opposite ends, as shown in FIG. 1C and the first diagram. For this reason, the dashed line 1 in Figure 2B
, J' and m, the green sheets 4 were alternately staggered and laminated so that the ends of the internal electrode layers themselves were alternately cut.

Next, as shown by the dashed-dotted lines 1, l' and m in FIG. 2B, the green ceramic capacitor element 6 in the form of a solid piece was produced by cutting along the dashed-dotted lines 1, l' and m (see FIG. 1C).

Next, the obtained solid green ceramic capacitor element 6 was fired at 1200 to 1300°C.

Next, the solid piece-shaped sintered ceramic capacitor element 6
The inner electrode layer 5 of the
Selectively apply silver or silver-palladium metal glaze paste as shown in
C. to form an external electrode 7.

〔Effect of the invention〕

As is clear from the above description, in the multilayer ceramic chip capacitor according to the present invention, the internal electrode layer is formed directly on the ceramic dielectric green sheet by electroless plating. Since it can be formed uniformly, it is not only economically superior, but it can also be reliably formed with good reproducibility, and unlike the printing method, the ceramic dielectric layer can be made as thin as possible in terms of operation. Therefore, when making a high capacity capacitor with a high g1 layer, the overall thickness of the capacitor can be reduced.

[Brief explanation of the drawing]

1A to 1D are explanatory diagrams of the manufacturing process of a multilayer ceramic chip capacitor according to an embodiment of the present invention, and FIG.
Figure A is a perspective view of internal electrode layers formed on individual ceramic green sheets, Figure 1B is an exploded perspective view showing the lamination of ceramic green sheets, and Figure 1C is a solid flake capacitor (-: child's perspective view). Figures 1 and 2 are cross-sectional views of a chip capacitor. 4...Ceramic phone layer (or green sea))
, 5... Internal electrode scrap, 6... Chip capacitor element, 7... External? ! ! Extreme terminal. Patent applicant Matsushita Electric Industrial Co., Ltd. Figure 1D Figure 2

Claims (1)

[Claims] 1. A step of forming a green sheet by kneading a mixture of a ceramic dielectric material and a water-insoluble resin binder material into a sheet shape, and forming a green sheet on one main surface of the green sheet. a step of forming an electrode layer, a step of laminating a required number of green sheets, a step of cutting the green sheet laminate into solid pieces, a step of sintering the obtained solid green sheet laminate, the above steps. This process consists of forming external electrode terminals at both exposed ends of the internal electrode layer of the solid piece-like sintered body, and the process of forming a plurality of internal electrode layers on one main surface of the green sheet is an electroless method. A method for manufacturing a multilayer ceramic chip capacitor, characterized in that a conductive metal layer is selectively deposited by a plating method. 2. The method for manufacturing a multilayer ceramic chip capacitor according to claim 1, wherein palladium or an alloy thereof is used as the conductive metal deposited by electroless plating.