JPS6318332A - Liquid crystal display device - Google Patents

Liquid crystal display device

Info

Publication number
JPS6318332A
JPS6318332A JP16188386A JP16188386A JPS6318332A JP S6318332 A JPS6318332 A JP S6318332A JP 16188386 A JP16188386 A JP 16188386A JP 16188386 A JP16188386 A JP 16188386A JP S6318332 A JPS6318332 A JP S6318332A
Authority
JP
Japan
Prior art keywords
signal
liquid crystal
crystal display
period
frame
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP16188386A
Other languages
Japanese (ja)
Inventor
Isamu Aoki
勇 青木
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Hitachi Ltd
Japan Display Inc
Original Assignee
Hitachi Device Engineering Co Ltd
Hitachi Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Hitachi Device Engineering Co Ltd, Hitachi Ltd filed Critical Hitachi Device Engineering Co Ltd
Priority to JP16188386A priority Critical patent/JPS6318332A/en
Publication of JPS6318332A publication Critical patent/JPS6318332A/en
Pending legal-status Critical Current

Links

Landscapes

  • Liquid Crystal (AREA)
  • Liquid Crystal Display Device Control (AREA)
  • Transforming Electric Information Into Light Information (AREA)

Abstract

PURPOSE:To eliminate irregularity in display by supplying an AC converted signal and a signal obtained by dividing the frequency of a strobe signal optionally to an exclusive OR gate and generating an AC-converted signal having a shorter period than said AC-converted signal. CONSTITUTION:A signal (FRM signal) which serves as both a frame scanning period signal and an AC-converted period signal is separated into a frame scan start command signal (FLM signal) 6 and an AC-converted signal M through a D flip-flop 1, the exclusive OR gate 2, and an inverter 4. Strobe signals STB which are outputted by as many as scanning electrodes within one frame period are frequency-divided by a counter 3 optionally and properly and this frequency-divided signal and the AC-converted signal M outputted from an integrated circuit for display device control are inputted to the one exclusive OR gate 2 to generate the short cycle AC-converted signal M' obtained by inverting the original AC-converted signal M more than once in the middle of the original cycle with the frequency-divided signal of the strobe signals. Consequently, the polarity of an electrode-applied voltage is inverted in polarity more than once in the middle of the scanning period of a certain frame and the irregularity in display is reduced.

Description

【発明の詳細な説明】 〔産業上の利用分野〕 本発明は、表示濃度のむらが少なく、見易く感じの良い
表示が得られるようにしたドツトマトリクス方式液晶表
示素子に関する。
DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to a dot matrix type liquid crystal display element that is capable of providing an easy-to-see and pleasant display with little unevenness in display density.

〔従来の技術〕[Conventional technology]

近年、大型の液晶表示に好んで用いられるドツトマトリ
クス方式液晶表示素子の制御に用いる液晶表示素子制御
用集積回路には多くの種類のものが既に開発され市販さ
れているが、全ての点で完全に使用目的に適合するもの
は必ずしも得られないのが現状である。
In recent years, many types of liquid crystal display element control integrated circuits have already been developed and commercially available for use in controlling dot-matrix type liquid crystal display elements, which are often used in large-sized liquid crystal displays, but none of them are perfect in all respects. Currently, it is not always possible to obtain products that are suitable for the intended use.

その中に、漢字表示などに特に便利なものがあるが、そ
の印加電圧の極性反転の周期を指示する交流化信号と、
走査電極群によるフレーム走査周期を示す信号とが共通
の信号として出力されている。このような、1フレーム
走査周期すなわち走査電極群によるフレーム走査−巡周
期の間、印加電圧極性が反転しないで、次ぎのフレーム
走査の開始と同時に印加電圧極性が反転するものの方が
、従来は寧ろ一般的であった。この液晶表示素子制御用
集積回路を用い、この制御用集積回路とインタフェース
をとり易いように予め設計された液晶表示素子駆動用集
積回路と組み合わせて液晶表示素子に所望の表示をさせ
ることが出来ることは勿論である。
Among them, there is one that is particularly useful for displaying kanji characters, etc., and there is an alternating current signal that instructs the cycle of polarity reversal of the applied voltage,
A signal indicating the frame scanning period by the scanning electrode group is output as a common signal. Conventionally, it has been preferable that the applied voltage polarity not be reversed during one frame scanning period, that is, the frame scanning cycle by the scanning electrode group, but that the applied voltage polarity be reversed at the same time as the start of the next frame scanning. It was common. This integrated circuit for controlling a liquid crystal display element can be used in combination with an integrated circuit for driving a liquid crystal display element that is designed in advance to be easily interfaced with this integrated circuit for controlling a liquid crystal display element to cause a liquid crystal display element to display a desired display. Of course.

しかし、このような交流化信号の周波数が比較的低い制
御用集積回路を用いると、液晶表示素子のしきい値電圧
は、駆動周波数に依存するので、空間周波数の低い表示
は濃く、空間周波数の高い比較的早く変化する個所の表
示は薄くなる表示むらが生じ、見た目が悪いという問題
があった。これに対し、電極への印加電圧の極性を反転
させる交流化信号の周期を、フレーム走査の周期より短
くして1フレーム走査周期の途中で1回以上印加電圧極
性を反転させることが、特開昭61−50119号公報
で提案されているが、この提案では、液晶表示素子制御
用集積回路が、交流化の周期を示す信号とフレーム走査
の周期を示す信号とに共通な信号を出力する場合につい
て、特別な配慮はしていなかった。
However, when using a control integrated circuit in which the frequency of the alternating signal is relatively low, the threshold voltage of the liquid crystal display element depends on the driving frequency, so the display with a low spatial frequency is dark, and the display with a low spatial frequency is dark. There was a problem in that the display in areas where the height changes relatively quickly becomes thinner and uneven, resulting in an unsightly appearance. On the other hand, Japanese Patent Application Laid-Open No. 2003-100002 discloses that the cycle of the alternating current signal that inverts the polarity of the voltage applied to the electrodes is made shorter than the frame scanning cycle, and the polarity of the applied voltage is inverted one or more times in the middle of one frame scanning cycle. This proposal is proposed in Publication No. 1983-50119, but in this proposal, when an integrated circuit for controlling a liquid crystal display element outputs a signal common to a signal indicating the alternating current cycle and a signal indicating the frame scanning cycle. No special consideration was given to this.

〔発明が解決しようとする問題点〕[Problem that the invention seeks to solve]

本発明は上記のような従来一般的に用いられて来た各フ
レーム走査期間毎に印加電圧極性を反転させるための交
流化信号兼フレーム走査周期信号を出力する液晶表示素
子制御用集積回路を用いた場合でも、表示むらが生じな
いようにした液晶表示装置を提供することを目的とする
The present invention uses an integrated circuit for controlling a liquid crystal display element which outputs an alternating current signal and a frame scanning period signal for inverting the applied voltage polarity every frame scanning period, which has been generally used as described above. An object of the present invention is to provide a liquid crystal display device in which display unevenness does not occur even when the display is uneven.

〔問題点を解決するための手段〕[Means for solving problems]

上記問題点を解決するために本発明においては、フレー
ム走査周期を示す信号と交流化周期を示す信号とに共通
して用いる信号を、走査電極群への各フレーム毎の走査
開始指令信号と交流化信号とに分離する手段と、この交
流化信号と、■フレーム走査周期当たり走査電極数だけ
出力されるストローブ信号を任意に分周した信号とを、
排他的論理和ゲートに通して前記交流化信号より短周期
にした交流化信号を作成する手段とを付加して設置し、
前記走査開始指令信号と前記短周期にした交流化信号を
用いて液晶表示素子を駆動するようにした。
In order to solve the above problems, in the present invention, a signal used in common for a signal indicating a frame scanning period and a signal indicating an alternating current conversion period is used as a scan start command signal for each frame to the scanning electrode group and an alternating current signal for each frame. means for separating the alternating current signal into an alternating current signal, and a signal obtained by arbitrarily dividing a strobe signal outputted as many times as the number of scanning electrodes per frame scanning period;
means for creating an alternating current signal having a shorter period than the alternating signal by passing it through an exclusive OR gate;
The scanning start command signal and the short-cycle alternating current signal are used to drive the liquid crystal display element.

〔作用〕[Effect]

上記のような構成にすると、あるフレームの走査期間の
途中で1回以上電極印加電圧の極性が反転するようにな
る。表示むらが生ずる理由は、液晶表示素子のしきい値
電圧は、駆動周波数に依存するので、空間周波数の低い
、同一表示が長時間継続して表示される個所では表示が
濃くなり、空間周波数の高い比較的早く変化する表示が
行われる個所では表示が薄くなるためであるから、印加
電圧極性の反転回数を多くすれば、電極への印加電圧の
極性が長期間(1フレーム走査期間)継続して同一に保
持される個所がな(なり、従って表示むらが少な(なる
With the above configuration, the polarity of the voltage applied to the electrodes is reversed at least once during the scanning period of a certain frame. The reason why display unevenness occurs is that the threshold voltage of a liquid crystal display element depends on the driving frequency. This is because the display becomes thinner in areas where the display changes relatively quickly, so by increasing the number of times the applied voltage polarity is reversed, the polarity of the voltage applied to the electrodes can continue for a long period of time (one frame scanning period). There are fewer parts that are kept the same, and therefore display unevenness is reduced.

但し、交流化信号の周波数を高くする場合に、丁度整数
倍たとえば2倍にすると、常に表示画面の上下方向中央
の水平線に沿って、濃淡の程度は少なくなっているとし
ても表示むらが現れ、目につき易い。また、例えば丁度
2倍でなく2倍より1だけ異なる周波数にすると、電圧
極性反転位置が走査電極1本ずつ順次各フレームで移動
することになり、この場合も目につき易い。電圧極性反
転は各フレーム毎に、表示画面上かなり離れた位置で、
その位置が常に変動しながら行われるのが望ましい。そ
れには前記の如く、1フレーム周期あたり走査電極数だ
け出力されるストローブ信号を任意に適当に分周して、
この分周した信号と、表示装置制御用集積回路から出力
された交流化信号とを一つの排他的論理和ゲートに入れ
、元の交流化信号を、元来の周期の途中で、前記ストロ
ーブ信号を分周した信号により1回以上反転させ(1−
0、又は0−1)た短周期の交流化信号を作るようにす
れば簡単に実行できる。
However, if the frequency of the alternating current signal is increased by an integer multiple, for example, twice, display irregularities will always appear along the horizontal line in the vertical center of the display screen, even if the degree of shading is small. Easy to notice. Further, for example, if the frequency is set to a frequency that is different by 1 from 2 times instead of just 2 times, the voltage polarity inversion position will move one scanning electrode at a time in each frame, which is also easy to notice. The voltage polarity is reversed at a position quite far away on the display screen for each frame.
It is desirable that the position be constantly varied. To do this, as mentioned above, the strobe signal output per frame period is divided as many times as the number of scanning electrodes.
This frequency-divided signal and the alternating current signal output from the display device control integrated circuit are put into one exclusive OR gate, and the original alternating signal is converted into the strobe signal in the middle of the original period. is inverted one or more times using a frequency-divided signal (1-
This can be easily carried out by creating a short-cycle alternating current signal (0 or 0-1).

〔実施例〕〔Example〕

第1図は本発明一実施例の回路要部を示すブロック図で
、1はDフリップフロップ、2は排他的論理和ゲート、
3はカウンタ、4はインバータ、5はフレーム走査周期
信号と交流化周期信号とを兼ねる信号(FRM信号)、
6はFRM信号から分離されたフレーム走査開始指令信
号(FLM信号)、7は短周期化された交流化信号(M
’倍信号、8はストローブ信号(STB) 、9はクロ
ック信号(ストローブ信号と同じものであるが、表示素
子駆動回路でクロック信号CLIとして用いる)である
。この実施例ではデユーティサイクルを100としく走
査電穫は100本)、フレーム走査周波数(従ってFL
M信号)は35Hzとした。従って5TB8の周波数は
3.5kHzとなる。FRM信号5から分離された元来
の交流化信号Mは1/35秒毎に極性反転を指令する。
FIG. 1 is a block diagram showing the main circuit parts of an embodiment of the present invention, in which 1 is a D flip-flop, 2 is an exclusive OR gate,
3 is a counter, 4 is an inverter, 5 is a signal (FRM signal) that serves as both a frame scanning periodic signal and an alternating current periodic signal,
6 is a frame scanning start command signal (FLM signal) separated from the FRM signal, and 7 is an alternating current signal (M
' double signal, 8 is a strobe signal (STB), and 9 is a clock signal (same as the strobe signal, but used as the clock signal CLI in the display element drive circuit). In this embodiment, the duty cycle is 100 and the scanning voltage is 100), the frame scanning frequency (therefore, the FL
M signal) was set at 35 Hz. Therefore, the frequency of 5TB8 is 3.5kHz. The original AC signal M separated from the FRM signal 5 commands polarity reversal every 1/35 seconds.

本実施例では短周期化された交流化信号は約1 /20
0秒毎に極性反転を指令する。なお、第1図中の破線輪
郭内はFRM信号をM信号とFLM信号に分離する手段
で、それ以外は交流化信号Mから短周期化した交流化信
号M°を作成する手段である。
In this embodiment, the shortened AC signal is approximately 1/20
Commands polarity reversal every 0 seconds. Note that the part within the broken line outline in FIG. 1 is a means for separating the FRM signal into an M signal and an FLM signal, and the other parts are means for creating an alternating current signal M° from an alternating current signal M with a short period.

また、第2図は各信号のタイミングチャートである。最
初のDフリップフロップとインバータとはFRM信号が
駆動回路側で必要とするFLM信号より5TB1パルス
分早く立ち上がっているので、それをFLM信号として
好都合なように位相を合わせる。
Moreover, FIG. 2 is a timing chart of each signal. Since the FRM signal of the first D flip-flop and the inverter rises earlier than the FLM signal required by the drive circuit by 5TB1 pulses, the phases of the first D flip-flop and inverter are adjusted to suitably match the FRM signal as the FLM signal.

〔発明の効果〕〔Effect of the invention〕

以上説明したように本発明によれば、僅かな回路を付設
するだけで、表示むらの少ない見易く感じの良い表示を
行うドツトマトリクス方式液晶表示装置が得られる。
As described above, according to the present invention, it is possible to obtain a dot matrix type liquid crystal display device that provides an easy-to-see and pleasant display with less display unevenness by adding only a small number of circuits.

【図面の簡単な説明】[Brief explanation of the drawing]

第1図は本発明の一実施例の回路要部を示すブロック図
、第2図は本発明装置各信号のタイミングチャートであ
る。
FIG. 1 is a block diagram showing the main parts of a circuit according to an embodiment of the present invention, and FIG. 2 is a timing chart of each signal in the device of the present invention.

Claims (1)

【特許請求の範囲】[Claims] 1、互いに直交する夫々多数の走査電極群と表示電極群
とを備えたドットマトリクス方式液晶表示素子を、印加
電圧の極性を反転させる周期を示す交流化信号と、走査
電極群によるフレーム走査周期を示す信号とを、共通信
号として出力する液晶表示素子制御用集積回路により制
御させる液晶表示装置において、前記共通信号を、走査
電極群への各フレーム毎の走査開始指令信号と交流化信
号とに分離する手段と、この交流化信号と、1フレーム
周期当たり走査電極数だけ出力されるストローブ信号を
任意に分周した信号とを、排他的論理和ゲートに通して
前記交流化信号より短周期にした交流化信号を作成する
手段とを付設し、前記液晶表示素子を、前記走査開始指
令信号と前記短周期にした交流化信号を用いて駆動する
ようにしたことを特徴とする液晶表示装置。
1. A dot matrix type liquid crystal display element having a large number of scanning electrode groups and a large number of display electrode groups, each perpendicular to each other, is controlled by an alternating current signal indicating the period for reversing the polarity of the applied voltage and a frame scanning period by the scanning electrode group. In a liquid crystal display device, the common signal is controlled by an integrated circuit for controlling a liquid crystal display element that outputs a signal shown as a common signal, and the common signal is separated into a scan start command signal for each frame to a group of scan electrodes and an alternating current signal. the alternating current signal, and a signal obtained by arbitrarily dividing the strobe signal output by the number of scanning electrodes per frame period, through an exclusive OR gate to make the cycle shorter than the alternating signal. A liquid crystal display device, further comprising: means for creating an alternating current signal, and the liquid crystal display element is driven using the scan start command signal and the short-cycle alternating signal.
JP16188386A 1986-07-11 1986-07-11 Liquid crystal display device Pending JPS6318332A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP16188386A JPS6318332A (en) 1986-07-11 1986-07-11 Liquid crystal display device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP16188386A JPS6318332A (en) 1986-07-11 1986-07-11 Liquid crystal display device

Publications (1)

Publication Number Publication Date
JPS6318332A true JPS6318332A (en) 1988-01-26

Family

ID=15743800

Family Applications (1)

Application Number Title Priority Date Filing Date
JP16188386A Pending JPS6318332A (en) 1986-07-11 1986-07-11 Liquid crystal display device

Country Status (1)

Country Link
JP (1) JPS6318332A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR100448937B1 (en) * 1997-09-29 2004-11-16 삼성전자주식회사 Polarity control signal generation circuit for thin film transistor liquid crystal display

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR100448937B1 (en) * 1997-09-29 2004-11-16 삼성전자주식회사 Polarity control signal generation circuit for thin film transistor liquid crystal display

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