JPS6320112B2 - - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a control device that controls an inverter using a pulse width modulation method.

FIG. 1 shows an inverter controlled by this type of control device. In FIG. 1, 1 is an inverter having switches RP, RN, SP, SN, TP, and TN made up of thyristors, and 2 is a DC power source with a voltage _Ed . In FIG. 2 showing a conventional control device, 3 is a selection circuit, 4 is an address circuit, and 5 and 6 are speed signals based on the address (signal) of the selection circuit 3.
Corresponding to REF, each sine wave data MS ₁ ...
...Memory from which MS _o and triangular wave data MT ₁ ......MT _n are read, 7 is a comparator that outputs a gate signal when it detects that the output of memory 5 is larger than the output of memory 6, 8 is a gate signal The switch RP shown in FIG. 1 is a distributor that selectively distributes the signal to the TN.

Next, the operation will be explained. Inverter 1 is
Switch RP...By turning on or off TN according to the gate signal of distributor 8, the output RO,
Vary the voltage and frequency of SO and TO arbitrarily.
The switch RP...TN is normally converted into triangular waves TR ₁ and TR ₂ by a comparator 7 as shown in Figure 3a.
and sine wave R, and when the former becomes larger than the latter, it is turned on. Figure 3b shows the switch
A waveform diagram showing the operating status of RP, with triangular waves TR ₁ ,
Corresponds to TR ₂ and is indicated by RP ₁ and RP ₂ . As is clear from Figure 3, by decreasing the triangular waves TR ₁ and TR ₂ or increasing the sine wave R, the output
RO can be reduced. It may be considered that the number of triangular waves TR ₁ and TR ₂ within one period of the sine wave R increases as the output frequency becomes lower.

Figure 4 shows the waveform a of the triangular wave TR with a cycle of 1/3 and a wave height ratio of 3/2 for one cycle of the sine waves R, S, and T, and the ON or OFF states of switches RP to TN. Waveforms b to g showing the voltage V _RS between the output lines,
Waveforms h to j of V _ST and V _TR are shown. In this case, the peak value of the triangular wave TR is fixed, and the peak values of the sine waves R, S, and T are changed to select relative values. The selection circuit 3 selects sine waves R, S,
Relative value between T and triangular wave TR is 2:3, period ratio is 1
3, and when it is decoded that the desired voltage is obtained, the corresponding data is stored in the memories 5 and 6.
MS _i and MT _j are read. The data MS _i is the data of the peak value of the reference wave signal REF, and MT _j is the waveform value when one cycle includes three cycles of the triangular wave TR. At the same time, the frequency at which the memories 5 and 6 are read is decoded from the reference signal REF by the address circuit 4, and data MS _i and MT _j are read from the memories 5 and 6. For example, when the memories 5 and 6 are composed of 256 bytes and the output frequency decoded from the reference signal REF is 50Hz, the address circuit 4 cyclically outputs addresses from address 00 to address FF at a cycle of 12.8KHz. . As a result, memory 5, 6
The sine wave R and the triangular wave TR read out are compared by a comparator 7, and if the latter is larger, the comparator 7 outputs a gate signal. This gate signal corresponds to switch RP. Switch RN, SP, SN, TP,
The gate signal of TN is composed of the gate signal of switch RP with its phase shifted, and is output from the distributor 8, and its waveforms are shown in FIGS. 4b to 4g, respectively. In Fig. 4, a represents the waveforms of sine waves R, S, T and triangular wave TR, and h to j represent the output voltages V _RS , V _ST ,
Indicates V _TR .

Conventional inverter control devices were configured as described above, so in order to change the output voltage with an accuracy of 1%, for example, it was necessary to store 100 types of sine waves in memory, which required a large capacity memory. However, if such a large capacity memory cannot be used, the number of triangular waves within one cycle is limited, so an output waveform with low harmonic content cannot be obtained. .

This invention was made to eliminate the drawbacks of the conventional ones as described above, and by modulating the frequency of the address for reading out the memory that stores the triangular wave, it is possible to generate a trapezoidal wave equivalent to a triangular wave with an arbitrary peak value. This is an inverter that can reduce memory capacity and perform highly accurate pulse width modulation by generating a sine wave, comparing it with a sine wave of a predetermined peak value, and obtaining a gate signal that turns on or off a switch according to the comparison result. The purpose is to provide a control device.

An embodiment of the present invention will be described below with reference to the drawings. In Figure 5, 9 is the reference signal
Analog/digital conversion of REF
Digital converter (hereinafter referred to as ADC), 10-1
~10~4 use the output 9a of the ADC9 as an address signal, and each has a triangular wave TRI shown in Figure 7a.
A memory that stores data corresponding to the signal DEL shown in Figure 7b, a memory that stores data that corresponds to the triangular wave TRIC shown in Figure 7b, and a memory that stores frequency information of the sine wave. This is the memory that I did. Furthermore, 11-1, 11-2,
11-3 are memories 10-1, 10-3,
A conversion circuit 14 includes a digital/analog (hereinafter referred to as DAC) 12 that converts the data read from the DAC 10-4 into an analog signal, and a voltage/frequency converter 13 that obtains a frequency corresponding to the output value of the DAC 12. signal generator (details will be explained below); 15 is a signal 11-3a of the conversion circuit 11-3;
16 is a memory that uses the signal 15a of the counter 15 as an address signal; 17 compares the signal 14a of the signal generator 14 with the signal (SIN) 16a of the memory 16; This is a comparator that inputs the result to the distributor 8 as a signal 17a.

In the signal generator 14, 18 is the conversion circuit 11
19 is a converter 11 which inputs the signal 11-2a of -2 and counts up or down;
-1 signal 11-1a (FIG. 7d) is gated according to the signal ALO (FIG. 7c); 20 is the output of AND gate 19 (FIG. 7e); ), a counter 21 counts up or down the data read from the memory 10-2 (corresponding to the signal DEL shown in FIG. 7b) and the signal 18a of the counter 18 (corresponding to the signal DEL shown in FIG. 7b). corresponding to TRIC), and the seventh
This is a comparator that obtains the signal ALO shown in Figure c.

As shown in FIG. 6, if a trapezoidal wave P with a period T _t is formed from a triangular wave TR with a peak value H, the following relationship holds true: ΔT=T _t /4 (1-1/H). Here, ΔT is the time of the top or bottom of the trapezoidal wave P. Such a trapezoidal wave P
is displayed as an 8-bit digital signal. In Figure 5, for example, when the number of signals is 8,
Shown in (8).

Next, the operation will be explained. counter 20
As shown in FIG. 6, the input signal 11-
1a and 11-2a, the countdown is started from the count FF, and when the count C _L is reached, the count is stopped for a time ΔT. after that,
It starts counting up, and when it reaches the count _CH , it stops counting for a time ΔT, then counts down, and repeats this operation. The time F _TRI during counting obtained by this can be expressed by the following formula.

F _TRI = 512/T _t -4Δt The counter 18 generates a triangular wave with a period twice the period T _t , and the frequency of the signal 11-2a
F _T2 is given by F _T2 = 1/T _t ×1024. In addition, the signal of the memory 10-2
DEL is given by Δx=1−4Δt/T _t . Therefore, the signal to the comparator 21 is
DEL and the signal 18a of the counter 18 are input and compared, and when the signal DEL>signal 18a,
Comparator 21 activates the signal ALO at its output (FIG. 7c). As a result, the AND gate 19 is opened and a trapezoidal wave P signal 14a as shown by the dotted line in FIG. 7a is obtained. signal 14a
is the signal 1 of the memory 16 by the comparator 17.
6a and becomes a signal 17a, which is input to the distributor 8. The distributor 8 includes switches RP, RN,
Outputs a gate signal that turns SP, SN, TP, and TN on or off.

In the above embodiment, the counters 18 and 20 are provided, but they may also be constructed from a memory in which triangular waves are stored in advance and an up counter.Also, although the above embodiment processes the signal digitally, it may be configured using an analog waveform. It may be processed as a waveform.

As described above, according to the present invention, a trapezoidal wave equivalent to a triangular wave is generated using frequency modulation, and then a pulse width modulated waveform is obtained by comparing it with a sine wave. Highly accurate control can be obtained, and since the data for generating the trapezoidal wave is stored in memory, the circuit configuration can be simplified.

[Brief explanation of the drawing]

Fig. 1 is an inverter connection diagram, Fig. 2 is a block diagram showing a conventional inverter control device, Figs. 3 and 4 are waveform diagrams showing the operation of the inverter control device shown in Fig. 2, and Fig. 5 is a waveform diagram showing the operation of the inverter control device shown in Fig. 2. Block diagram showing an inverter control device according to an embodiment of the present invention, No. 6
7 and 7 are waveform diagrams showing the operation of the inverter control device shown in FIG. 5. 5, 6, 10-1 to 10-4, 16... memory, 7, 17, 21... comparator, 8... distributor, 11-1 to 11-3... conversion circuit, 14...
...Signal generator, 15, 18, 20...Counter.
Note that in the figures, the same reference numerals indicate the same parts.

Claims (1)

[Claims] 1. A first memory stored to generate pulses of a predetermined frequency per unit time according to a reference signal, and a pulse of a predetermined frequency generated from the first memory are input. An up-down counter that counts up or down after counting up or down a certain number of times; and a setting device that sets a period during which the counting operation is interrupted for a predetermined time according to the reference signal when transitioning from counting up or down to counting down or up. and a second signal generator that generates a sine wave by inputting the reference signal, the output of the first signal generator and the output of the second signal generator. An inverter control device that controls an inverter by generating a pulse width modulated gate signal by comparing the 2. The inverter control device according to claim 1, wherein the setting device sets the counting interruption period by comparing data output from two memories according to a reference signal.