JPS63201337U - - Google Patents
Info
- Publication number
- JPS63201337U JPS63201337U JP9307687U JP9307687U JPS63201337U JP S63201337 U JPS63201337 U JP S63201337U JP 9307687 U JP9307687 U JP 9307687U JP 9307687 U JP9307687 U JP 9307687U JP S63201337 U JPS63201337 U JP S63201337U
- Authority
- JP
- Japan
- Prior art keywords
- chip
- integrated circuit
- hybrid integrated
- substrate
- molding material
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 239000000758 substrate Substances 0.000 claims description 6
- 239000012778 molding material Substances 0.000 claims description 4
- 239000000843 powder Substances 0.000 claims description 3
- 239000011800 void material Substances 0.000 description 3
- 238000010586 diagram Methods 0.000 description 1
- 239000007788 liquid Substances 0.000 description 1
Landscapes
- Structures Or Materials For Encapsulating Or Coating Semiconductor Devices Or Solid State Devices (AREA)
Description
第１図は本考案の一実施例を示す混成集積回路
要部の縦断面図、第２図は従来の混成集積回路の
斜視図、第３図はボイドのある混成集積回路の斜
視図、第４図はその縦断面図、第５図はボイド発
生を説明するために示した混成集積回路要部の縦
断面図、第６図はボイド発生を防止する構成を備
えた従来の混成集積回路要部の縦断面図である。
１……基板、２……ＩＣチツプ、３……粉末モ
ールド材、４……リード、５……ボイド、６……
液状モールド材、７……絶縁部材。
FIG. 1 is a vertical cross-sectional view of the main parts of a hybrid integrated circuit showing an embodiment of the present invention, FIG. 2 is a perspective view of a conventional hybrid integrated circuit, FIG. 3 is a perspective view of a hybrid integrated circuit with voids, and FIG. Figure 4 is a vertical cross-sectional view of the same, Figure 5 is a vertical cross-sectional view of the main parts of a hybrid integrated circuit shown to explain void generation, and Figure 6 is a diagram of a conventional hybrid integrated circuit equipped with a configuration to prevent void generation. FIG. 1...Substrate, 2...IC chip, 3...Powder molding material, 4...Lead, 5...Void, 6...
Liquid molding material, 7...Insulating member.
補正 昭６３．４．２０
実用新案登録請求の範囲を次のように補正する
。Amendment April 20, 1983 The scope of claims for utility model registration is amended as follows.
【実用新案登録請求の範囲】
少なくともＩＣを基板に載置し、前記ＩＣを含
む基板を粉末モールド材で絶縁封止する混成集積
回路において、前記基板におけるＩＣのマウント
部分に、前記ＩＣ下面のほぼ全面に当接する絶縁
部材を備えていることを特徴とする混成集積回路
。
図面の簡単な説明を次のように補正する。
明細書第６頁第１０行「チツプ」を削除する。[Claims for Utility Model Registration] In a hybrid integrated circuit in which at least an IC is mounted on a substrate and the substrate including the IC is insulated and sealed with a powder molding material, approximately the bottom surface of the IC is mounted on the mounting portion of the IC on the substrate. A hybrid integrated circuit characterized by having an insulating member in contact with the entire surface. The brief description of the drawing has been amended as follows. Delete "chip" from page 6, line 10 of the specification.
Claims (1)
Ｃチツプを含む基板を粉末モールド材で絶縁封止
する混成集積回路において、前記基板におけるＩ
Ｃチツプのマウント部分に、前記ＩＣチツプ下面
のほぼ全面に当接する絶縁部材を備えていること
を特徴とする混成集積回路。 At least an IC chip is placed on the substrate, and the
In a hybrid integrated circuit in which a substrate including a C chip is insulated and sealed with a powder molding material, the I
A hybrid integrated circuit characterized in that a mount portion of a C chip is provided with an insulating member that comes into contact with substantially the entire lower surface of the IC chip.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP9307687U JPS63201337U (en) | 1987-06-16 | 1987-06-16 |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP9307687U JPS63201337U (en) | 1987-06-16 | 1987-06-16 |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPS63201337U true JPS63201337U (en) | 1988-12-26 |
Family
ID=30955349
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP9307687U Pending JPS63201337U (en) | 1987-06-16 | 1987-06-16 |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS63201337U (en) |
Citations (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS6094744A (en) * | 1983-10-27 | 1985-05-27 | Nippon Denso Co Ltd | Hybrid ic device |
-
1987
- 1987-06-16 JP JP9307687U patent/JPS63201337U/ja active Pending
Patent Citations (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS6094744A (en) * | 1983-10-27 | 1985-05-27 | Nippon Denso Co Ltd | Hybrid ic device |
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