JPS6321425B2 - - Google Patents
Info
- Publication number
- JPS6321425B2 JPS6321425B2 JP56174563A JP17456381A JPS6321425B2 JP S6321425 B2 JPS6321425 B2 JP S6321425B2 JP 56174563 A JP56174563 A JP 56174563A JP 17456381 A JP17456381 A JP 17456381A JP S6321425 B2 JPS6321425 B2 JP S6321425B2
- Authority
- JP
- Japan
- Prior art keywords
- transformer
- converter
- voltage
- inductance
- power supply
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired
Links
Classifications
-
- H—ELECTRICITY
- H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
- H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
- H02M3/00—Conversion of DC power input into DC power output
- H02M3/22—Conversion of DC power input into DC power output with intermediate conversion into AC
- H02M3/24—Conversion of DC power input into DC power output with intermediate conversion into AC by static converters
- H02M3/28—Conversion of DC power input into DC power output with intermediate conversion into AC by static converters using discharge tubes with control electrode or semiconductor devices with control electrode to produce the intermediate AC
- H02M3/325—Conversion of DC power input into DC power output with intermediate conversion into AC by static converters using discharge tubes with control electrode or semiconductor devices with control electrode to produce the intermediate AC using devices of a triode or a transistor type requiring continuous application of a control signal
- H02M3/335—Conversion of DC power input into DC power output with intermediate conversion into AC by static converters using discharge tubes with control electrode or semiconductor devices with control electrode to produce the intermediate AC using devices of a triode or a transistor type requiring continuous application of a control signal using semiconductor devices only
- H02M3/33538—Conversion of DC power input into DC power output with intermediate conversion into AC by static converters using discharge tubes with control electrode or semiconductor devices with control electrode to produce the intermediate AC using devices of a triode or a transistor type requiring continuous application of a control signal using semiconductor devices only of the forward type
Landscapes
- Engineering & Computer Science (AREA)
- Power Engineering (AREA)
- Dc-Dc Converters (AREA)
Description
【発明の詳細な説明】 本発明はDC−DCコンバータに関する。[Detailed description of the invention] The present invention relates to a DC-DC converter.
従来のDC−DCコンバータを第1図に示す。こ
のDC−DCコンバータは、トランス3に対して一
方向駆動形で、スイツチングトランジスタ4の導
通時にトランス3に電源1の電圧Eを印加すると
同時に出力側へ送出する形式で、この間にトラン
ス3のインダクタンスLに蓄積された励磁エネル
ギは、スイツチングトランジスタ4がオフの期間
にトランス3の巻線電圧が反転し、第1図のiに
示す流路に電流を流して励磁エネルギーを放出
(リセツト)し、入力電源1へ回生(充電)する
形式である。ここでトランス3の2次側の端子
AB,CD間に配置された平滑回路6は、第2図
に示すコンデンサでも励磁エネルギーの放出(リ
セツト)に関しては同様である。 A conventional DC-DC converter is shown in Figure 1. This DC-DC converter is a unidirectional drive type for the transformer 3, and when the switching transistor 4 is turned on, the voltage E of the power supply 1 is applied to the transformer 3 and simultaneously sent to the output side. The excitation energy stored in the inductance L is released (reset) when the winding voltage of the transformer 3 is reversed while the switching transistor 4 is off, causing current to flow through the flow path shown at i in Figure 1. The input power source 1 is then regenerated (charged). Here, the secondary side terminal of transformer 3
The smoothing circuit 6 disposed between AB and CD is similar to the capacitor shown in FIG. 2 in terms of releasing (resetting) excitation energy.
本回路は、スイツチングトランジスタ4がオフ
の期間にトランス3の巻線電圧が反転した事を利
用して、リセツトダイオード2へ流路が移り蓄積
された励磁エネルギの放出を実現するものである
が、オフ区間にその放出を完了しかつ時間的余裕
を得たいがためにトランス3のインダクタンスL
を小さめに設定する必要があり、このためオフ区
間の初期の電圧の立上りが第3図に示すように急
峻になり、雑音の発生源になる欠点を有してい
た。 This circuit utilizes the fact that the winding voltage of the transformer 3 is inverted while the switching transistor 4 is off to transfer the flow path to the reset diode 2 and release the accumulated excitation energy. , the inductance L of the transformer 3 is reduced in order to complete the discharge in the off period and to obtain time margin.
It is necessary to set the voltage to a small value, and as a result, the initial voltage rise in the off period becomes steep as shown in FIG. 3, which has the disadvantage of becoming a source of noise.
電源のスパイク雑音は、電圧変化量dv/dtがトラ
ンスの捲線間等化容量を介して縦電流に化けるメ
カニズムで発生することは衆知であり、従つて電
圧変化量を小さくする程電源雑音は小さく出来る
が、上記従来回路は立上りが急峻なため雑音を多
く発生する欠点があつた。 It is well known that spike noise in a power supply is generated by the mechanism in which the voltage variation dv/dt is transformed into a longitudinal current via the equalization capacitance between the windings of a transformer. Therefore, the smaller the voltage variation, the smaller the power supply noise. However, the conventional circuit described above has the disadvantage of generating a lot of noise due to its steep rise.
本発明は、オフ区間の電圧変化量を小さくし
て、低雑音化を計つたDC−DCコンバータを提供
することを目的とする。 SUMMARY OF THE INVENTION An object of the present invention is to provide a DC-DC converter that achieves low noise by reducing the amount of voltage change in the off period.
本発明においては、トランスのインダクタンス
を大きく設定するに際して、主スイツチのスイツ
チング周期と、上記トランスのインダクタンス及
びそのトランスの線間容量・上記主スイツチとし
てトランジスタを用いた場合のその接合容量等で
決定される自由共振状態との関係において、トラ
ンスに蓄積された励磁エネルギーを主スイツチの
オフ時にリセツトするために、最初の上記自由共
振状態による反転区間にはリセツト回路は設け
ず、トランスのインダクタンスLを大きく自由共
振状態にしてこの状態を次の反転(つまり、オン
区間と同相)区間まで接続させ、上記次の反転区
間内における自由共振過程で、上記主スイツチと
並列設値したダイオードによる逆流流路で励磁エ
ネルギーを放出し電源へ回生(充電)することに
より、オフ区間の電圧変化量を最小にして励磁エ
ネルギーのリセツトをなす事により、低雑音の電
源が実現するようになしたことを特徴とする。 In the present invention, when setting the inductance of the transformer to a large value, it is determined by the switching period of the main switch, the inductance of the transformer, the line capacitance of the transformer, the junction capacitance when a transistor is used as the main switch, etc. In relation to the free resonance state, in order to reset the excitation energy stored in the transformer when the main switch is turned off, no reset circuit is provided in the first inversion period due to the above free resonance state, and the inductance L of the transformer is increased. A state of free resonance is established, and this state is connected to the next inversion section (that is, in phase with the on section), and during the free resonance process within the next inversion section, a reverse flow path is created by a diode set in parallel with the main switch. By discharging excitation energy and regenerating (charging) the power supply, the amount of voltage change in the off section is minimized and the excitation energy is reset, thereby realizing a low-noise power supply.
以下図面に示した実施例によつて、本発明を詳
細に説明する。 The present invention will be explained in detail below with reference to embodiments shown in the drawings.
第4図に本発明の一実施例回路図を示し、第6
図にスイツチ回路の端子電圧波形とその電流波形
を示す。第4図において、スイツチ回路はスイツ
チングトランジスタ4とダイオード2を並列に接
続して構成され、互に逆方向に流路が確保されて
トランス3と電源1とを直列に接続することによ
りスイツチングトランジスタ4のスイツチオンで
電力を出力側に伝送する。そしてスイツチングト
ランジスタ4のスイツチオフでは、大きめに設定
されたトランス3のインダクタンスLとトランス
3の線間容量及びスイツチングトランジスタ3の
接合容量等の浮遊容量とによつて決定される第6
図に示すなだらかな電圧変化を示す自由共振で最
初の反転区間を通過し、次の反転でオン区間と同
相で、かつトランス3の誘起電圧が電源1の電圧
より大きい分だけ前記ダイオード2により、リセ
ツト電流が電源1へ充電する動作をする。その時
のスイツチ回路の端子電圧e、電流iの波形を第
6図に示す。ここで本発明者らの実験確認によれ
ば、第4図に示した回路の浮遊総合容量は275PF
であると確認され、このときトランス3のインダ
クタンスを230mHまで大きくできることになり
20KHzの自由共振周波数を得る。従つてスイツチ
ングトランジスタ4のオフ区間を30μsecとすれば
上記最初の反転区間は25μsecとなることにより、
次の反転区間はオン区間と同相にすることができ
るものである。なお第4図に示した端子F,G,
Hを持つスイツチ回路は第5図に示すFETと、
その構造上内在するダイオードとでも同様な動作
が得られることは勿論である。 FIG. 4 shows a circuit diagram of an embodiment of the present invention.
The figure shows the terminal voltage waveform of the switch circuit and its current waveform. In FIG. 4, the switch circuit is constructed by connecting a switching transistor 4 and a diode 2 in parallel, with flow paths in opposite directions being ensured, and switching is performed by connecting a transformer 3 and a power supply 1 in series. Power is transmitted to the output side by switching on transistor 4. When the switching transistor 4 is switched off, the sixth inductance is determined by the inductance L of the transformer 3, which is set to be relatively large, and the stray capacitance such as the line capacitance of the transformer 3 and the junction capacitance of the switching transistor 3.
The diode 2 passes through the first inversion section with the free resonance showing the gentle voltage change shown in the figure, and is in phase with the on section at the next inversion, and the induced voltage of the transformer 3 is larger than the voltage of the power supply 1. The reset current operates to charge the power supply 1. The waveforms of the terminal voltage e and current i of the switch circuit at that time are shown in FIG. According to experimental confirmation by the inventors, the total stray capacitance of the circuit shown in Figure 4 is 275 P F.
It was confirmed that the inductance of transformer 3 could be increased to 230mH.
Obtain a free resonant frequency of 20KHz. Therefore, if the off period of the switching transistor 4 is 30 μsec, the above first inversion period will be 25 μsec.
The next inversion section can be in phase with the on section. Note that the terminals F, G, and
The switch circuit with H is the FET shown in Figure 5,
Of course, the same operation can be obtained even with a diode inherent in the structure.
以上詳しく説明したように、本発明によればス
イツチング時の電圧変化量は従来例にくらべ1/10
0程度低減が出来、従つて、入出力に現われるス
パイク状の雑音の量も1/100程度に低減出来、本
発明に係るDC−DCコンバータは雑音を嫌うデイ
ジタル伝送分野における電源として多大な効果を
発揮するものである。 As explained in detail above, according to the present invention, the amount of voltage change during switching is 1/10 compared to the conventional example.
Therefore, the amount of spike-like noise that appears in the input/output can be reduced to about 1/100, and the DC-DC converter according to the present invention has a great effect as a power supply in the field of digital transmission where noise is averse. It is something that can be demonstrated.
第1図は従来のDC−DCコンバータの回路図第
2図は第1図の平滑回路の別な回路図、第3図は
第1図の動作説明用波形図である。第4図は、本
発明によるDC−DCコンバータの一実施例回路
図、第5図は第4図に使用されるスイツチ回路の
他の実施例の回路図、第6図は第4図に示した実
施例の動作説明用波形図である。
1:電源、2:ダイオード、3:トランス、
4:スイツチングトランジスタ。
FIG. 1 is a circuit diagram of a conventional DC-DC converter; FIG. 2 is another circuit diagram of the smoothing circuit of FIG. 1; and FIG. 3 is a waveform diagram for explaining the operation of FIG. 4 is a circuit diagram of one embodiment of the DC-DC converter according to the present invention, FIG. 5 is a circuit diagram of another embodiment of the switch circuit used in FIG. 4, and FIG. 6 is a circuit diagram of another embodiment of the switch circuit used in FIG. FIG. 4 is a waveform diagram for explaining the operation of the embodiment. 1: power supply, 2: diode, 3: transformer,
4: Switching transistor.
Claims (1)
バータにおいて、スイツチの導通時にトランスに
蓄積されたエネルギーをリセツトするために外部
電源へ回生または外部素子へ消費させる流通手段
を設けるとともに、上記トランスのインダクタン
ス及び該トランスの線間容量等に基づく自由共振
周波数により上記流通区間のトランスの捲線に誘
起する電圧の向きを、スイツチが導通してエネル
ギーを出力へ伝送する時と同相的に構成された事
を特徴とするDC−DCコンバータ。1. In a DC-DC converter that drives the transformer in one direction, in order to reset the energy accumulated in the transformer when the switch is turned on, a distribution means is provided to regenerate it to an external power source or to dissipate it in an external element, and to reduce the inductance of the transformer. and that the direction of the voltage induced in the windings of the transformer in the distribution section by the free resonance frequency based on the line capacitance of the transformer is configured to be in phase with the direction when the switch conducts and transmits energy to the output. Characteristic DC-DC converter.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP17456381A JPS5879473A (en) | 1981-11-02 | 1981-11-02 | DC-DC converter |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP17456381A JPS5879473A (en) | 1981-11-02 | 1981-11-02 | DC-DC converter |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPS5879473A JPS5879473A (en) | 1983-05-13 |
| JPS6321425B2 true JPS6321425B2 (en) | 1988-05-06 |
Family
ID=15980740
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP17456381A Granted JPS5879473A (en) | 1981-11-02 | 1981-11-02 | DC-DC converter |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS5879473A (en) |
Families Citing this family (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US4760512A (en) * | 1986-06-11 | 1988-07-26 | American Telephone And Telegraph Company, At&T Bell Laboratories | Circuit for reducing transistor stress and resetting the transformer core of a power converter |
| FR2997246B1 (en) * | 2012-10-23 | 2016-01-22 | Valeo Sys Controle Moteur Sas | CONFIGURE POWER CIRCUIT FOR PROVIDING TWO OUTPUT VOLTAGES |
Family Cites Families (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS5696895A (en) * | 1979-12-29 | 1981-08-05 | Fujitsu Ltd | Circuit element carrying position detector |
| JPS5918867U (en) * | 1982-07-29 | 1984-02-04 | ダイワ精工株式会社 | Collapsing prevention device for double bearing type fishing reel |
-
1981
- 1981-11-02 JP JP17456381A patent/JPS5879473A/en active Granted
Also Published As
| Publication number | Publication date |
|---|---|
| JPS5879473A (en) | 1983-05-13 |
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