JPS6322110B2 - - Google Patents
Info
- Publication number
- JPS6322110B2 JPS6322110B2 JP55005916A JP591680A JPS6322110B2 JP S6322110 B2 JPS6322110 B2 JP S6322110B2 JP 55005916 A JP55005916 A JP 55005916A JP 591680 A JP591680 A JP 591680A JP S6322110 B2 JPS6322110 B2 JP S6322110B2
- Authority
- JP
- Japan
- Prior art keywords
- circuit
- input
- output
- point
- low
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired
Links
Classifications
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L25/00—Baseband systems
- H04L25/02—Details ; arrangements for supplying electrical power along data transmission lines
- H04L25/06—DC level restoring means; Bias distortion correction ; Decision circuits providing symbol by symbol detection
- H04L25/061—DC level restoring means; Bias distortion correction ; Decision circuits providing symbol by symbol detection providing hard decisions only; arrangements for tracking or suppressing unwanted low frequency components, e.g. removal of DC offset
Landscapes
- Engineering & Computer Science (AREA)
- Power Engineering (AREA)
- Computer Networks & Wireless Communication (AREA)
- Signal Processing (AREA)
- Dc Digital Transmission (AREA)
Description
【発明の詳細な説明】
本発明は、デイジタル伝送方式の再生中継器に
おいて、低域しや断特性を補償し直流成分を再生
するために用いる量子化帰還回路に関するもので
ある。DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a quantization feedback circuit used for compensating for low-frequency cut-off characteristics and regenerating DC components in a digital transmission type regenerative repeater.
一般にデイジタル伝送方式の再生中継器におい
ては、中継器を動作させる為の電力が伝送される
信号に重畳されて同一伝送路により供給される
為、各中継器の入力及び出力において低域しや断
特性を持つた電力分離用波器が挿入されている
が、この低域しや断により、伝送路等化増幅信号
に符号間干渉が発生する。この低域しや断による
符号間干渉を軽減する為の一つの方法として量子
化帰還が提案されている。 In general, in digital transmission type regenerative repeaters, the power to operate the repeater is superimposed on the transmitted signal and supplied through the same transmission path, so there is no low-frequency loss or disconnection at the input and output of each repeater. Although a power separating waveform with special characteristics is inserted, intersymbol interference occurs in the transmission line equalized and amplified signal due to this low frequency cutoff. Quantization feedback has been proposed as one method for reducing intersymbol interference due to low-frequency distortion.
第1図に従来の量子化帰還回路及びその周辺回
路のブロツク図を示す。1は電力分離用波器も
含めた伝送路等化増幅部の低域しや断回路、2は
量子化帰還回路、11は分岐回路、12は反転回
路、13は遅延回路、14及び18は低域通過
波器、15及び16は2入力加算回路、そして1
7は識別再生回路である。またa点は前位の中継
器の出力点、b点は低域しや断回路1の低域しや
断による歪をうけた伝送路等化増幅信号の出力
点、c点は低域しや断回路1による歪を量子化帰
還によつて補償したあとの伝送路等化増幅信号出
力点、d点はc点の信号を識別再生した信号の出
力点である。 FIG. 1 shows a block diagram of a conventional quantization feedback circuit and its peripheral circuits. 1 is a low-frequency cutoff circuit of the transmission line equalization amplifier including a power separation waveform, 2 is a quantization feedback circuit, 11 is a branch circuit, 12 is an inversion circuit, 13 is a delay circuit, 14 and 18 are 15 and 16 are 2-input adder circuits, and 1
7 is an identification and reproducing circuit. Also, point a is the output point of the previous repeater, point b is the output point of the transmission line equalized amplified signal that has been distorted by the low frequency cutoff of the low frequency cutoff circuit 1, and point c is the output point of the low frequency cutout. Point d is the output point of the transmission line equalized amplified signal after the distortion caused by disconnection circuit 1 has been compensated for by quantization feedback, and point d is the output point of the signal obtained by identifying and reproducing the signal at point c.
ここで第1図のa点からc点までの総合の伝達
関数をT0(S)とすると、T0(S)は式で示さ
れる。 Here, if the overall transfer function from point a to point c in FIG. 1 is T 0 (S), then T 0 (S) is expressed by the formula.
T0(S)=P(S)・(1−Q1(S)・e-STx
)+Q2(S)・e-STd)……
ここで、P(S)は低域しや断回路1の伝達特
性、Q1(S)は低域通過波器14の伝達特性、
Q2(S)は低域波器18の伝達特性、Txは遅延
回路13における遅延時間、Tdはc点よりd点
を経由してc点にもどるまでの遅延時間である。 T 0 (S)=P(S)・(1−Q 1 (S)・e -STx
)+Q 2 (S)・e -STd )... Here, P(S) is the transfer characteristic of the low-pass cutout circuit 1, Q 1 (S) is the transfer characteristic of the low-pass wave generator 14,
Q 2 (S) is the transfer characteristic of the low frequency converter 18, T x is the delay time in the delay circuit 13, and T d is the delay time from point c to point d and back to point c.
次にP(S)=1−P1(S)とおくと、P1(S)
は低域波特性となり、式は式になる。 Next, if we set P(S)=1−P 1 (S), then P 1 (S)
is the low frequency characteristic, and the equation becomes Eq.
T0(S)=1−P1(S)+P1(S)・Q1(S)・e-
STx−Q1(S)・e-STx+Q2(S)・eSTd……
Q1(S)のしや断周波数をP1(S)のしや断周
波数より十分高くとると、P1(S)・Q1(S)≒P1
(S)となり、式が得られる。 T 0 (S) = 1-P 1 (S) + P 1 (S)・Q 1 (S)・e -
STx −Q 1 (S)・e -STx +Q 2 (S)・e STd ... If the shearing frequency of Q 1 (S) is set sufficiently higher than the shearing frequency of P 1 (S), P 1 (S)・Q 1 (S)≒P 1
(S), and the formula is obtained.
T0(S)=1−P1(S)(1−e-STx)−{Q1(
S)e-STx−Q2(S)・e-STd}……
上式よりQ1(S)=Q2(S)、Tx=Tdとしたとき
T0(S)は、
T0(S)=1−P1(S)(1−e-STd) ……
となる。これによりQ1(S)とQ2(S)の特性を
一致させ、Txの遅延量をTdと等しくすれば、遅
延時間Td秒後にはT0(S)=1となり、低周波し
や断P(S)の影響がなくなることがわかる。 T 0 (S) = 1-P 1 (S) (1-e -STx ) - {Q 1 (
S) e -STx -Q 2 (S)・e -STd }... From the above formula, when Q 1 (S) = Q 2 (S) and T x = T d
T 0 (S) becomes T 0 (S)=1-P 1 (S) (1-e -STd )... As a result, if the characteristics of Q 1 (S) and Q 2 (S) are matched and the delay amount of T x is made equal to T d , T 0 (S) = 1 after the delay time T d seconds, and low frequency It can be seen that the influence of the shear cut P(S) disappears.
しかし、この量子化帰還回路には以下のような
欠点がある。第一にQ1(S)及びQ2(S)の相対
精度が必要である。第二にQ1(S)及びQ2(S)
のしや断周波数が符号伝送速度より低いため、そ
の素子値が大きくなり、そのため実装規模が大と
なる。第三にTx=Tdとなるように遅延を精密に
調整しなければならないが、それが非常にむずか
しい。すなわち低域波器14あるいは18を通
過してきた信号は、低域通過波器を通つてきて
いるため、その振幅が小さく、立上り立下りも悪
いこと、及び観測点のc点には低域波器を通つ
ていない、振幅の大きな主信号も加わつているた
め、低域波器14あるいは18を通つてきた信
号のみを観測することが困難であること等によ
り、c点にて2つの信号の時間位置を精密に一致
させることが困難である。 However, this quantization feedback circuit has the following drawbacks. First, the relative accuracy of Q 1 (S) and Q 2 (S) is required. Second, Q 1 (S) and Q 2 (S)
Since the cut-off frequency is lower than the code transmission speed, the element value becomes large, and therefore the implementation scale becomes large. Third, the delay must be precisely adjusted so that T x = T d , but this is extremely difficult. In other words, since the signal that has passed through the low-pass wave filter 14 or 18 has passed through the low-pass wave filter, its amplitude is small and its rising and falling edges are also poor. Since the main signal with a large amplitude that has not passed through the wave transmitter is also added, it is difficult to observe only the signal that has passed through the low frequency wave transmitter 14 or 18. It is difficult to precisely match the time positions of the signals.
本発明の目的は、上述のような欠点をなくし、
精度の必要でない波器で構成でき、実装規模も
小さく、かつ調整も容易な量子化帰還回路を提供
することにある。 The purpose of the present invention is to eliminate the above-mentioned drawbacks,
It is an object of the present invention to provide a quantization feedback circuit that can be constructed with waveformers that do not require precision, has a small implementation scale, and is easy to adjust.
本発明の構成ブロツク図を第2図に示す。図中
11〜17及びb〜dはそれぞれ第1図の各回路
及び各点と同一である。またe点は遅延調整用観
測端子である。本発明の量子化帰還回路は入力信
号を分岐回路11にて2つに分岐し、分岐した第
1の出力を第1の加算回路15の第1の入力に接
続し、15の出力を識別再生回路17の入力に接
続し、15の出力を出力信号とすると同時に第2
の加算回路16の第1の入力に接続し、分岐回路
11の第2の出力を反転回路12及び遅延回路1
3を経て加算回路16の第2の入力に接続し、こ
の出力を低域通過波器14を経て加算回路15
の第2の入力に接続することにより構成されてい
る。 A structural block diagram of the present invention is shown in FIG. 11 to 17 and b to d in the figure are the same as each circuit and each point in FIG. 1, respectively. Further, point e is an observation terminal for delay adjustment. The quantization feedback circuit of the present invention branches an input signal into two at the branch circuit 11, connects the branched first output to the first input of the first addition circuit 15, and identifies and reproduces the output of the 15. It is connected to the input of circuit 17, and at the same time the output of circuit 15 is used as an output signal.
The second output of the branch circuit 11 is connected to the first input of the adder circuit 16 and the second output of the branch circuit 11 is connected to the inverter circuit 12 and the delay circuit 1.
3 to the second input of the adder circuit 16, and the output is connected to the adder circuit 15 via the low-pass wave generator 14.
by connecting it to the second input of the.
次に本発明の回路動作を述べる。なお第2図の
入力端子b点に入る信号は、第1図と同様に、前
位の中継器の出力点aよりの信号が低域しや断回
路1を通過してきた信号である。a点よりc点ま
での総合伝達関数をT1(S)、低域波器14の
特性をQ1(S)とし、P(S)、Tx、Tdを式の
ものと同一にしたとき、T1(S)は式となる。 Next, the circuit operation of the present invention will be described. Note that the signal entering the input terminal point b in FIG. 2 is the signal from the output point a of the preceding repeater that has passed through the low-frequency cutoff circuit 1, as in FIG. The overall transfer function from point a to point c is T 1 (S), the characteristics of the low-pass filter 14 are Q 1 (S), and P (S), T x , and T d are the same as those in the equation. Then, T 1 (S) becomes Eq.
T1(S)=P(S)+(e-STd−P(S)・e-STx)・Q1
(S)=P(S)・(1−Q1(S)・e-STx)+Q1(S
)・e-STd
……
式におけるQ1(S)、Q2(S)をQ1(S)=Q2
(S)とすると、式のT0(S)は式のT1(S)
と等しくなる。従つて本発明による量子化帰還回
路は第1図に示す従来の回路と同一の働きをする
事が分る。そして従来の回路では、低域通過波
器が2回路必要であつたのが1回路だけでよく、
そのため2回路間の相対精度も必要でなくまた実
装規模も半分になる。また、e点にて波形観測を
すれば、低域通過波器を通つていないため、振
幅が大きく立上り、立下りがよい波形が観測で
き、かつ主信号も分離されているため、遅延回路
を精度よく行なうことが可能である。T 1 (S) = P(S) + (e -STd -P(S)・e -STx )・Q 1
(S)=P(S)・(1−Q 1 (S)・e −STx )+Q 1 (S
)・e -STd ... Q 1 (S) and Q 2 (S) in the formula are Q 1 (S) = Q 2
(S), then T 0 (S) in the equation is T 1 (S) in the equation
is equal to Therefore, it can be seen that the quantization feedback circuit according to the present invention functions in the same manner as the conventional circuit shown in FIG. In addition, the conventional circuit required two low-pass waveformers, but now only one circuit is required.
Therefore, relative accuracy between the two circuits is not required, and the implementation scale is halved. In addition, if you observe the waveform at point e, you can observe a waveform with a large amplitude rise and a good fall because it does not pass through the low-pass waver, and the main signal is also separated, so the delay circuit It is possible to perform this with high precision.
以上述べた様に、本発明によれば実装規模が小
さく、素子精度も必要でなく、かつ調整も容易な
量子化帰還回路を実現することができる。 As described above, according to the present invention, it is possible to realize a quantization feedback circuit that has a small packaging scale, does not require element precision, and is easy to adjust.
第1図は従来の量子化帰還回路及びその周辺回
路のブロツク図、第2図は本発明による量子化帰
還回路のブロツク図である。
1……低域しや断回路、2……量子化帰還回
路、11……分岐回路、12……反転回路、13
……遅延回路、14……低域通過波器、15,
16……加算回路、17……識別再生回路。
FIG. 1 is a block diagram of a conventional quantization feedback circuit and its peripheral circuits, and FIG. 2 is a block diagram of a quantization feedback circuit according to the present invention. 1...Low frequency cutoff circuit, 2...Quantization feedback circuit, 11...Branch circuit, 12...Inversion circuit, 13
...Delay circuit, 14...Low pass wave generator, 15,
16... Addition circuit, 17... Discrimination reproducing circuit.
Claims (1)
し、その一方を第一の加算回路の第一の入力と
し、前記加算回路出力を識別再生回路の入力と
し、この識別回路の出力を第二の加算回路の第一
の入力とし、分岐した前記入力信号の他方を反転
回路及び遅延回路を経て前記第二の加算回路の第
二の入力とし、この第二の加算回路出力を低域通
過波器を経て前記加算回路の第二の入力とする
事により構成し、前記識別回路出力を出力端とす
ることを特徴とする量子化帰還回路。1 The input signal supplied to the input terminal is branched into two, one of which is used as the first input of the first addition circuit, the output of the addition circuit is used as the input of the identification and regeneration circuit, and the output of this identification circuit is used as the input of the first addition circuit. The other of the branched input signals is used as the second input of the second adder circuit through an inversion circuit and a delay circuit, and the output of this second adder circuit is used as a low-pass signal. 1. A quantization feedback circuit, characterized in that the quantization feedback circuit is configured by inputting the signal to the second input of the adder circuit through a waveform generator, and having the output of the discrimination circuit as the output terminal.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP591680A JPS56103561A (en) | 1980-01-22 | 1980-01-22 | Quantization feedback circuit |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP591680A JPS56103561A (en) | 1980-01-22 | 1980-01-22 | Quantization feedback circuit |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPS56103561A JPS56103561A (en) | 1981-08-18 |
| JPS6322110B2 true JPS6322110B2 (en) | 1988-05-10 |
Family
ID=11624212
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP591680A Granted JPS56103561A (en) | 1980-01-22 | 1980-01-22 | Quantization feedback circuit |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS56103561A (en) |
Families Citing this family (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS6442960A (en) * | 1987-08-10 | 1989-02-15 | Nippon Telegraph & Telephone | Low frequency regeneration circuit |
| JP2779425B2 (en) * | 1988-12-16 | 1998-07-23 | 日本電信電話株式会社 | DC offset remover |
Family Cites Families (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS514912A (en) * | 1974-07-01 | 1976-01-16 | Nippon Electric Co | Pcm chukeihoshiki |
-
1980
- 1980-01-22 JP JP591680A patent/JPS56103561A/en active Granted
Also Published As
| Publication number | Publication date |
|---|---|
| JPS56103561A (en) | 1981-08-18 |
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