JPS63233377A - Peak hold circuit - Google Patents

Abstract

PURPOSE:To obtain an excellent holding characteristic by provided a diode one end of which is connected to a non-inversion input terminal of an operational amplifier and also a resistance means which is connected between the opposite-side terminal of said diode. CONSTITUTION:When a peak hold circuit is initialized, a reset signal input terminal 3 is driven at a high level, a transistor 16 is put in an ON state, and a potential at the node of resistors 13 and 14 is turned forcibly to be an earth potential. Accordingly, a charge of a capacitor 15 is discharged rapidly through a series circuit of a diode 9 and the resistance 13, a voltage of an output terminal 2 also lowers, and thus a resetting function is fulfilled. When there is an input voltage at an input terminal 1 at the time of a resetting operation, the charge of the capacitor 15 is discharged forcibly by the resetting operation, a balance of the whole is lost, and therefore an output terminal value determined by a supply voltage or the like. At this time,m a current limiting resistance 12 prevents the breakdown due to an extraordinary current flowing through diodes 7-9.

Description

DETAILED DESCRIPTION OF THE INVENTION (Field of Industrial Application) The present invention relates to a peak hold circuit with a reset function used, for example, in a NiCd battery charging circuit with a certain type of control method.

(Prior Art) NiCd batteries are used in various portable electronic devices, and recently many have adopted a rapid charging method that requires a short charging time. There are various control methods for quick charging of NiCd batteries, but among them, there is a so-called one that controls the completion of charging by detecting that the terminal voltage of the battery being charged changes over time from positive to negative at the end of charging. The Δ■ detection control method is likely to be close to the ideal. This -ΔV detection control system charging circuit requires a peak hold circuit for storing the past maximum battery terminal voltage during charging and comparing it with the current battery terminal voltage. This peak hold circuit requires good holding characteristics to hold the maximum value of the battery's terminal voltage, which changes slightly over a long period of time, and a reset capability to release the holding state as necessary. be.

FIG. 2 shows a conventional peak hold circuit used for this purpose. This peak hold circuit has input terminal 1. Output terminal 2. Reset signal input terminal 3.
Operational amplifiers 4, 5. Diode 6.7,8. resistance 10,
11,12. Capacitor 15. It has a relay 17 consisting of an excitation coil 18 and a relay contact 19.

If the DC voltage applied to input terminal 1 has a positive slope with respect to time and increases, the DC voltage at output terminal 2 is
Due to the feedback effect of the diode and resistor, the voltage rises while showing the same value as the input terminal 1, and at the same time, the hold capacitor 15 is charged to the same voltage as the output terminal 2. Next, when the DC voltage applied to the power terminal 1 reaches its maximum value and begins to decrease over time, the charge accumulated in the hold capacitor 15 is discharged by the backflow prevention function of the diode 6.7.8. The terminal voltage of the hold capacitor 15 continues to maintain the maximum voltage applied to the input terminal 1 without being affected. Furthermore, since the operational amplifier 5 is configured with a voltage follower circuit for the non-inverting input to which the hold capacitor 15 is connected, the DC voltage at the output terminal 2 is equal to the terminal voltage of the hold capacitor 15, that is, applied to the input terminal 1. continue to maintain the maximum voltage set.

On the other hand, when starting charging, it is necessary to forcibly discharge the charge accumulated in the hold capacitor 15 in order to initialize the circuit, but in this conventional circuit, the relay 17 is activated by a signal from the reset signal input terminal 3. This is achieved by driving and closing the contact 18. In order to obtain good bold characteristics, the operational amplifier 5 generally has a high input resistance J-F.
For the ET input type, a film capacitor is used as the hold capacitor 15.

However, this conventional circuit has a large size and requires a relay or mechanical switch that consumes a large amount of current in order to realize the reset function, which is a major disadvantage in meeting the recent demands for smaller equipment and lower power consumption. It became.

In order to overcome this drawback, a method can be considered to replace mechanical switches such as relays with electronic switches such as transistors and C-MOS analog switches, but in general, these electronic switches do not have perfect interrupting characteristics and only a few nA.
Since there is a leakage current on the order of ~10 μA, the charge of the hold capacitor 15 escapes, making it unsuitable for a peak hold circuit that requires good hold characteristics.

-For example, in the case of a NiCd quick charge circuit using the ΔV detection control method, a bold characteristic of better than about ±50TrLV/10 minutes is required, and a high-performance film capacitor with small self-discharge is practically only one to a few. Since only μF capacitance can be used, the total allowable value of various leakage currents flowing out (or flowing into) the capacitor is 50 μF.
~100 pA, so it can be understood that it is difficult to simply replace it with an electronic switch.

(Problems that the defense attempts to solve) As mentioned above, in order to achieve both good hold characteristics and reset aspects in conventional peak hold circuits with a reset function, the reset element must be large in shape,
There are problems in that it consumes a lot of current and requires an expensive mechanical switch such as a relay.

Therefore, an object of the present invention is to eliminate this problem and provide a peak hold circuit with a reset function that has good hold characteristics and replaces the mechanical switch with a small, low power consumption, and inexpensive electronic switch. .

[Structure of the invention]

(Means for Solving the Problems) In order to achieve the above object, the present invention utilizes transistors and C-
No imperfections compared to mechanical switches such as MOS analog switches? In order to enable the electronic switch to be used as a reset element, the output terminal, which has a voltage approximately equal to the terminal voltage of the hold capacitor and the terminal voltage of the hold capacitor, which is a high impedance circuit, and has a low impedance, is connected to a diode and a resistor. are connected in a series circuit, and a reset element is connected to the connection point between the diode and the resistor.

(Function) The resistance value of the resistor is selected depending on the leakage current of the reset element so that the voltage drop due to the leakage current is sufficiently smaller than the contact potential difference of the diode. Therefore, when the reset element is off, the charge in the hold capacitor is not discharged through the diode, maintaining good hold characteristics, and when the reset element is on, the charge on the hold capacitor is quickly discharged through the diode. is discharged and initialization of the circuit is achieved.

(Example) An example of the present invention will be described in detail below based on the drawings. FIG. 1 is a circuit diagram of a peak hold circuit according to an embodiment of the present invention, and elements that perform the same functions as those of the conventional example shown in FIG. 2 are given the same numbers to avoid redundant explanation. In this embodiment, a reset circuit 20 is provided between the hold capacitor 15 and the output terminal 2. This reset circuit 20 includes a diode 9. Resistors 13, 14. It consists of a transistor 16.

During normal operation, the reset signal input terminal 3 is kept at a low level and the transistor 16 is in an "off" state. The output terminal and the inverting input terminal of the operational amplifier 5 are directly connected. Because of the voltage follower connection, the voltages at the non-inverting input terminal and the output terminal 2 are approximately equal, with only a slight difference in offset voltage of the operational amplifier itself. Typically, this offset voltage is on the order of a few millivolts. Therefore, if the leakage current when the transistor 16 is off is completely zero like a mechanical switch, the diode 9. The potential difference across the series circuit of resistors 13 and 14 is several mV, and even if the polarity is in the forward direction of the diode, it is much smaller than the contact potential difference required to cause forward current to flow through the diode.
The current flowing through this series circuit is almost negligible, and the charge of the hold capacitor does not escape and the hold characteristics are not impaired. In addition, if the polarity is in the opposite direction to the diode, there is no problem in theory.

However, in reality, transistors have a leakage current determined by lCBO, and this value is several μA under adverse conditions such as high temperature.
It can be of the order of. This has made it difficult to replace the mechanical switches in conventional circuits with electronic switches such as transistors. In the circuit of this embodiment, this leakage current flows through the operational amplifier 5 with low output impedance.
Since the current flows from the output terminal 2 of the resistor 14 to the transistor via the resistor 14, if the value of the resistor 14 and the worst value of the leakage current are set to a small value, the leakage current at both ends of the resistor 14 can be reduced. The voltage drop caused by this can be sufficiently small. For example, if the value of the resistor 14 is 1Ω, even if the leakage current is 10 μA, the voltage drop is only 10 mV.

This value does not particularly change the conditions described above when the transistor is ideal, but rather ensures a sufficiently good hold characteristic.

Next, the operation when initializing this peak hold circuit will be explained.

In this case, the reset signal input terminal 3 is driven to a high level, the transistor 16 is turned on, and the resistor 13 and the resistor 1
The potential of the connection point No. 4 is forced to the ground potential. Therefore, the charge in the capacitor 15 is quickly discharged through the series circuit of the diode 9 and the resistor 13, and the voltage at the output terminal 2 is accordingly reduced, thereby fulfilling the reset function. If there is an input voltage at the input terminal 1 during the reset operation, the charge in the capacitor 15 will be forcibly discharged due to the reset operation and the overall balance will be disrupted, so the output terminal of the operational amplifier 4 will try to take the maximum value determined by the power supply voltage etc. do. resistance 12
is a current limiting resistor for preventing abnormal current from flowing through the diode 7°8.9 at this time and causing damage. Further, the resistor 13 is used to adjust the value of the output voltage of the output terminal 2 in the reset state depending on the division ratio of the resistor 12, and is not particularly required depending on the application.

As described above, according to this embodiment, it is possible to employ an electronic switch with a leakage current as a reset element without impairing the bold characteristics. In the embodiment shown in FIG. 1, a transistor is used as the reset element, but it is not limited to the transistor, and other electronic switches such as a C-MOS analog switch can also be used, and a mechanical switch may also be used.

In this way, in this embodiment, the reset function can be realized using the electronic switch while maintaining good hold characteristics. Since electronic switches are smaller and operate with lower current consumption than conventional mechanical switches such as relays, they are ideal for downsizing devices and reducing power consumption. Especially in recent years,
Transistors and ICs can be made into surface-mounted chip components, and their effects will be even greater. Furthermore, by using an electronic switch, a cheaper circuit can be constructed. Note that this embodiment requires good hold characteristics. -ΔV detection method Can be widely applied to NiCd battery rapid heavy current circuits, etc.

〔Effect of the invention〕

As described in detail above, according to the present invention, it is possible to provide a peak hold circuit that has good bold characteristics, is small in size, and has low power consumption.

[Brief explanation of the drawing]

FIG. 1 is a circuit diagram showing an embodiment of the present invention, and FIG. 2 is a conventional peak hold circuit diagram. 1... Input terminal, 2... Output terminal, 3... Reset signal input terminal, 4, 5... Operational amplifier, 6.7.8
゜9...Diode, 10.11.12, 13.14
...Resistor, 15...Hold capacitor, 16...
・Transistor Figure 1 Figure 2 Procedure? ■Authentic document (method) 1. Indication of the case Patent Application No. 66668 of 1988 2. Name of the invention Peak hold circuit 3. Person making the amendment Relationship with the case Patent applicant (307) Toshiba Corporation 4, Agent (〒104) 2-11-2-7, Ginza, Chuo-ku, Tokyo Contents of the amendment Between the second and third lines of the second page of the specification of the application, "
3. Insert "Detailed Description of the Invention". ,λ・ma−,′・V,,′

Claims (2)

[Claims] (1) A peak hold circuit that responds to changes in the input DC voltage, holds and outputs the maximum value of the input DC voltage, and initializes the operating state as necessary,
The output circuit section includes at least a hold capacitor and an operational amplifier in which one end of the hold capacitor is connected to a non-inverting input terminal and an output terminal and an inverting input terminal are directly connected;
In a peak hold circuit in which the output terminal of the operational amplifier is the output terminal of the peak hold circuit, a diode having one end connected to the non-inverting input terminal of the operational amplifier, a terminal on the opposite side of this diode, and the output of the operational amplifier circuit. 1. A peak hold circuit comprising a resistor circuit connected between terminals and a switch means connected to the resistor circuit. (2) The peak hold circuit according to claim 1, wherein the switch means is a transistor.