JPS63249248A - アドレス管理方式 - Google Patents

アドレス管理方式

Info

Publication number
JPS63249248A
JPS63249248A JP62084241A JP8424187A JPS63249248A JP S63249248 A JPS63249248 A JP S63249248A JP 62084241 A JP62084241 A JP 62084241A JP 8424187 A JP8424187 A JP 8424187A JP S63249248 A JPS63249248 A JP S63249248A
Authority
JP
Japan
Prior art keywords
transmission data
stored
area
transmission
communication line
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP62084241A
Other languages
English (en)
Japanese (ja)
Other versions
JPH0542022B2 (cs
Inventor
Takashi Hatano
畑野　隆司
Takayuki Moriyama
森山　貴幸
Yoshio Morita
森田　義雄
Minoru Nakahara
稔 中原
Kazuo Sato
和夫 佐藤
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fujitsu Dai Ichi Communications Software Ltd
Fujitsu Ltd
Original Assignee
Fujitsu Dai Ichi Communications Software Ltd
Fujitsu Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fujitsu Dai Ichi Communications Software Ltd, Fujitsu Ltd filed Critical Fujitsu Dai Ichi Communications Software Ltd
Priority to JP62084241A priority Critical patent/JPS63249248A/ja
Publication of JPS63249248A publication Critical patent/JPS63249248A/ja
Publication of JPH0542022B2 publication Critical patent/JPH0542022B2/ja
Granted legal-status Critical Current

Links

Landscapes

  • Computer And Data Communications (AREA)
  • Communication Control (AREA)
JP62084241A 1987-04-06 1987-04-06 アドレス管理方式 Granted JPS63249248A (ja)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP62084241A JPS63249248A (ja) 1987-04-06 1987-04-06 アドレス管理方式

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP62084241A JPS63249248A (ja) 1987-04-06 1987-04-06 アドレス管理方式

Publications (2)

Publication Number Publication Date
JPS63249248A true JPS63249248A (ja) 1988-10-17
JPH0542022B2 JPH0542022B2 (cs) 1993-06-25

Family

ID=13824968

Family Applications (1)

Application Number Title Priority Date Filing Date
JP62084241A Granted JPS63249248A (ja) 1987-04-06 1987-04-06 アドレス管理方式

Country Status (1)

Country Link
JP (1) JPS63249248A (cs)

Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5177102A (cs) * 1974-12-27 1976-07-03 Nippon Electric Co

Patent Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5177102A (cs) * 1974-12-27 1976-07-03 Nippon Electric Co

Also Published As

Publication number Publication date
JPH0542022B2 (cs) 1993-06-25

Similar Documents

Publication Publication Date Title
CA2170458C (en) Multi-cluster computer system
US5119481A (en) Register bus multiprocessor system with shift
EP0551242B1 (en) Multiprocessor buffer system
US7738443B2 (en) Asynchronous broadcast for ordered delivery between compute nodes in a parallel computing system where packet header space is limited
US11269529B2 (en) Neural network data processing apparatus, method and electronic device
US6715008B2 (en) Method and system for over-run protection in a message passing multi-processor computer system using a credit-based protocol
CN108632166A (zh) 一种基于dpdk的收包二级缓存方法及系统
US7206857B1 (en) Method and apparatus for a network processor having an architecture that supports burst writes and/or reads
US11687837B2 (en) Architecture to support synchronization between core and inference engine for machine learning
EP0322116B1 (en) Interconnect system for multiprocessor structure
JPS63249248A (ja) アドレス管理方式
JPH03214942A (ja) ディジタル信号時間差補正回路
AU635157B2 (en) Method of assigning slots in a ucol-type star network
KR102335798B1 (ko) 다수의 클라이언트 데이터를 처리하는 저장 장치 및 방법
JP2505298B2 (ja) スプリットバスにおける可変バス幅指定方式及び可変バス幅情報受信方式
US9548947B2 (en) PPI de-allocate CPP bus command
Walsch Architecture and prototype of a real-time processor farm running at 1 MHz
EP0990993A1 (en) Event counter
FR2788868A1 (fr) Appareil de traitement de donnees et procede de traitement de donnees
US7447205B2 (en) Systems and methods to insert broadcast transactions into a fast data stream of transactions
US7783796B2 (en) Method for releasing data of storage apparatus
Datta et al. Fast and scalable algorithms for the Euclidean distance transform on the LARPBS
CN116954886A (zh) 节点预选方法、pod调度方法、装置、服务器及介质
SU1501058A1 (ru) Устройство дл доступа к динамической базе ассоциативных данных
US9413665B2 (en) CPP bus transaction value having a PAM/LAM selection code field