JPS6325542B2 - - Google Patents

Description

Detailed Description of the Invention (Field of Industrial Application) The present invention is applicable to audio equipment, radio receivers, television receivers, video tape recorders,
The present invention relates to a pulse noise reduction device that can reduce pulse noise that has entered an audio signal system from the outside in a video disc player or the like in an audible manner.

(Prior art) Pulse noise, such as ignition noise of a car or pulse noise generated by other electrical equipment, is generated in the audio signal system of various equipment such as electrical equipment or electronic equipment that has an audio signal system. It is well known that if this happens, the quality of the audio signal will deteriorate.

Conventionally, methods for reducing the deterioration in audio signal quality caused by the above-described pulsed noise include (a) reducing the gain of the signal transmission system during the period in which pulsed noise occurs; Alternatively, there is a method of cutting off the signal transmission system (reducing the gain to zero... employing a sketch circuit) to reduce the pulse noise, and (b) reducing the signal level of the signal during the pulse noise period. The most common method of noise reduction has been to try to reduce pulse noise by holding the signal level at the level just before the pulse noise period. ) and (b) have the disadvantage that the signal is lost during the pulse noise period,
Also, by applying the above-mentioned measures (a) and (b),
The problem has been that a sufficient noise reduction effect cannot be obtained.

By the way, in order to interpolate the signal loss that occurs during the noise period, after converting the analog signal to a digital signal, a correction signal corresponding to the signal loss portion is created by applying the linear prediction method, and the correction signal is used to interpolate the signal loss that occurs during the noise period. Interpolation of signals during periods of noise is also used in some digital devices, but this requires the use of complex and expensive circuits. , such solutions have not been applied to general audio equipment.

Now, as mentioned above, when the pulse noise mixed in the signal is reduced, the signal dropout will occur depending on the period of existence of the pulse noise. The problem is that it is not always possible to obtain an audio signal of good quality, and the use of complex and expensive circuitry is required to interpolate the missing portions of the signal to solve the above-mentioned problems. This means that the problem is that it is difficult to apply to general audio equipment.

In order to solve the above-mentioned conventional problems, the present applicant's company first uses a differentiating circuit, a sample hold circuit, and a signal having slope information of the desired signal during a period in which pulse noise occurs in the input audio signal. and control signals are supplied,
An analog circuit with a simple circuit configuration that includes a signal correction circuit that is configured to remove pulse noise in the input audio signal and linearly interpolate the desired signal during periods where pulse noise occurs. We proposed a pulse noise reduction device that uses a circuit to generate a correction signal that can interpolate the missing part of the signal during the period where pulse noise occurs, thereby obtaining a high quality audio signal. did.

FIG. 1 is a block diagram of the previously proposed pulse noise reduction device. In FIG. 1, 1 is an input terminal for an input audio signal S1 mixed with pulse noise, and 2 is a delay circuit. ,
CSG is a control signal generation circuit composed of a pulse noise detection circuit 15 and a pulse shaping circuit 16, and from this control signal generation circuit CSG, pulse noise mixed in the input audio signal S1 is detected. A control signal S2 is generated with a pulse width corresponding to the period in which .

The control signal S2 generated from the control signal generation circuit CSG described above is required to correspond correctly to the position on the time axis of the pulse noise mixed in the input audio signal. By the time the generation circuit CSG detects the pulse noise mixed in the input audio signal and generates the control signal S2 having a pulse width corresponding to the period in which the pulse noise exists, Since there is a predetermined time delay determined depending on the operating characteristics of the pulse noise detection circuit 15 used, the pulse noise mixed in the input audio signal and the pulse noise generated in correspondence with the pulse noise are generated. The input audio signal supplied to the input terminal 1 is delayed by the delay circuit 2, which has a delay time approximately equal to the time difference between the input audio signal and the control signal S2, and various signals to be performed by the control signal S2 are generated. Processing is performed correctly at the location of pulsed noise in the input audio signal.

The input audio signal S1 indicated by a in FIG.
The information input audio signal S1 is given a necessary time delay by the delay circuit 2, and the location of pulse noise mixed in the input audio signal S1 shown in a in FIG. 2; This corresponds correctly to the position on the time axis of the control signal S2 indicated by b in FIG.

In FIG. 2, for the input audio signal, time t1 → time t2, time t3 → time t4,
Pulse noise N in each period from time t5 to time t6
1, N2, and N3 are included.

In FIG. 1, numeral 3 is an amplifier having low output impedance characteristics, 4 is a switch that performs on/off operation according to the control signal S2, and 5 is used to store a correction voltage for linear interpolation operation. A capacitor 6 is an amplifier having high input impedance characteristics, a capacitor 7, a resistor 8, an amplifier 9, etc. constitute a differentiating circuit used for signal prediction, and a further 10 is a differential circuit used for signal prediction. A switch for on/off operation, 11 is a charge storage capacitor, 12
1 is an amplifier, and 13 is a voltage-current conversion circuit.

In the previously proposed pulse noise reduction device shown in FIG.
is supplied to The switch 4 is turned off by the control signal S2 generated during the period when the pulse noises N1, N2, N3 are occurring.

Therefore, the capacitor 5 connected to the output side of the switch 4 has the above-mentioned noises N1, N
2, the signal voltage immediately before N3 is held instantaneously.
On the other hand, since the signal S5 (e in FIG. 2) having slope information of the desired signal is supplied to the capacitor 5 described above when the switch 4 described above is turned off, the output terminal 14 is supplied with the signal S5 (e in FIG. 2). A signal S3 as shown in (c), that is, an output signal S3 in which the pulse noise in the input audio signal S1 has been removed is sent out.

The output signal S3 is sent to the output terminal 14 as described above, and at the same time, the output signal S3 is sent to the capacitor 7,
Since it is also supplied to the differential circuit constituted by the resistor 8 and the amplifier 9, the amplifier 9
A differential signal S4 obtained by differentiating the output signal S3 described above is outputted from the differential signal S4.

The differential signal S4 described above is the original signal (desired signal)
It shows a phase difference of 90 degrees with respect to the above-mentioned output signal S3, etc., and a constant phase difference in the linearly interpolated signal section (period in which pulse noise existed in the original signal) in the above-mentioned signal S3. A signal section exhibiting a constant signal level is generated corresponding to a signal portion exhibiting a slope of .

The signal level of the signal section showing the above-mentioned constant signal level in the differential signal S4 becomes a positive signal level or a negative signal level depending on the direction of the slope in the original signal,
Thus, the polarity differs depending on the direction of the slope of the original signal, and the signal level of the signal section showing a constant signal level in the differential signal S4 described above differs depending on the degree of slope of the original signal. The size of the gap between the two levels is changing.

The differential signal S4 described above is supplied to a hold circuit composed of a switch 10, a capacitor 11, an amplifier 12, etc., but the switch 10, like the switch 4, is supplied with pulse noises N1, N2,
Period during which N3 occurs (time t1 → time t2,
Since it is turned off by the control signal S2 generated from time t3 to time t4 and from time t5 to time t6, the above-mentioned hold circuit eliminates the pulse noise N.
1, N2, and N3 are occurring (time t1→
Since the magnitude of the signal immediately before the start of those periods is maintained and output over the period (time t2, time t3→time t4, time t5→time t6), the output signal of the amplifier 12 of the hold circuit is as shown in FIG. A signal S5 as shown in e is obtained, and this signal S5 is substantially the same as the signal S4 described above when the device is operating in a steady state. The hold circuit described above is essential for operation until the device enters steady state operation.

Signal S5 output from the above-mentioned hold circuit
is provided with a signal section showing a constant signal level corresponding to a signal section showing a constant signal level in the differential signal S4 described above, and as described above, a constant signal section in the differential signal S4 described above is provided. Since the signal section indicating the level indicates the slope information of the original signal (desired signal), the output signal S5 from the hold circuit also changes to the desired signal due to the signal section indicating the constant signal level. This includes slope information.

Signal S5 output from the hold circuit, that is, signal S5 having slope information of the desired signal
is stored in the capacitor 5 described above via the voltage-current conversion circuit 13.

As the voltage-current conversion circuit 13, for example, one having a configuration as shown in FIG. 3 can be used.
That is, in FIG. 3, A is an inverting amplifier, R
1 to R6 are resistors, Q1 is a PNP transistor, Q
2 is an NPN transistor, and since the output signal of this circuit is taken out from the connection point between the collector of transistor Q1 and the collector of transistor Q2, this circuit has high output impedance characteristics.

By the way, as mentioned above, the output impedance of the amplifier 3 is very low, and the input impedance of the above-mentioned amplifier 6 is very high. Current will flow only at certain times.

The charging/discharging operation of the capacitor 5 described above is as follows:
When the voltage stored in the capacitor 11 in the hold circuit is positive, current flows linearly into the capacitor 5 in the positive direction, and when the voltage stored in the capacitor 11 in the hold circuit is negative, the current flows into the capacitor 5. A charging/discharging operation is performed in such an operating mode that a current is discharged linearly in the negative direction from the terminal 5. The slope of charging and discharging in the capacitor 5 described above is proportional to the magnitude of the hold voltage in the capacitor 11 described above.

The above operation can be performed correctly if a 90° phase difference is maintained between the input audio signal S1 and the differential output signal S4, and if the noise period is extremely short with respect to the period of the desired signal. In that case, the charging/discharging operation waveform is as shown by the solid line f in Figure 2, and as a result, the output signal S3 after linear interpolation is shown in c in Figure 2. will be sent to the output terminal 14.

(Problems to be Solved by the Invention) The previously proposed pulse noise reduction device explained with reference to FIGS. 1 to 3 has a relatively simple circuit configuration, such as requiring only two switch circuits. However, considering the widespread use of such devices, there has been a demand for a device that is simpler in circuit layout and cheaper. This was done in response to a demand.

(Means for Solving the Problems) The present invention detects pulse noise in an input audio signal including pulse noise, and generates a control signal having a pulse width corresponding to the period in which the pulse noise occurs. and a control signal generated by said control signal generating means corresponding to the pulsed noise in the input audio signal, and the time difference between said control signal and the corresponding pulsed noise. Means for delaying an input audio signal containing pulsed noise by a delay circuit having an equal delay time, the control signal as described above is supplied as a timing signal for operation, and the pulsed noise in the input audio signal is delayed. a linear interpolation circuit configured to perform a linear interpolation operation on the desired signal during the period in which pulse noise is occurring by being supplied with a signal having slope information of the desired signal in the period in which pulse noise is occurring. A noise reduction device consisting of a switch circuit that cuts off signal transmission during a period when pulse noise is generated by the control signal as the linear interpolation circuit described above, and an in-phase amplifier with the output side of the switch circuit. A first capacitor provided between the signal transmission path between the input side of the amplifier and the ground, and a second capacitor provided between the output side of the common-mode amplifier and the input side of the common-mode amplifier. The present invention provides a pulse noise reduction device using a series circuit with a resistor.

(Example) Hereinafter, specific contents of the pulse noise reduction device of the present invention will be described in detail with reference to the accompanying drawings. FIG. 4 is a block diagram of one embodiment of the pulse noise reduction device of the present invention, and FIG.
6 is a waveform diagram for explaining the operation of the pulse noise reduction device of the present invention, and FIG. 6 is a circuit diagram for explaining the linear interpolation operation of the pulse noise reduction device of the present invention.

In the block diagram of an embodiment of the pulse noise reduction device of the present invention shown in FIG.
is an input terminal for the input audio signal Sa (a in FIG. 5) mixed with pulse noise, 18 is a delay circuit, and CSG is composed of a pulse noise detection circuit 26 and a pulse shaping circuit 27. This control signal generation circuit CSG is a control signal generation circuit.
A control signal Sb (b in FIG. 5) having a pulse width corresponding to the period in which the pulse noise mixed in the input audio signal Sa exists is generated.

The control signal Sb generated from the control signal generation circuit CSG described above must correspond correctly to the positions on the time axis of the pulse noises N1, N2, and N3 mixed in the input audio signal Sa. However, the control signal generation circuit CSG detects the pulse noises N1, N2, and N3 mixed in the input audio signal Sa, and accordingly changes the time t1 at which the pulse noise exists → time t.
2. Control signals with pulse widths corresponding to each period of time t3 → time t4 and time t5 → time t6
Since there is a predetermined time delay determined depending on the operating characteristics of the pulse noise detection circuit 26 used before Sb is generated, the pulse noise N1 mixed in the input audio signal Sa ，
N2, N3 and their pulse noise N1, N2, N
3 and the correspondingly generated control signal Sb.
The input audio signal Sa supplied to the input terminal 17 is delayed, and various signal processing to be performed by the control signal Sb described above is performed to eliminate the pulse noise N1, N2,
Make sure that it is performed correctly at the location where N3 exists.

The input audio signal Sa shown in a of FIG.
The input audio signal Sa is given the required time delay by the delay circuit 18, and the existence of pulse noises N1, N2, and N3 mixed into the input audio signal Sa shown in a of FIG. The position and the position on the time axis of the control signal Sb shown by b in FIG. 5 correctly match.

In addition, in FIG. 5, for the input audio signal Sa, time t1 → time t2, time t3 → time t
4. As mentioned above, pulse noises N1, N2, and N3 are included in each period from time t5 to time t6, as described above.

In FIG. 4, 19 is an amplifier having low output impedance characteristics, and 20 is the aforementioned control signal.
A switch that performs on/off operation by Sb,
24 is a capacitor used to store the correction voltage for performing the linear interpolation operation, and 21 is a non-inverting amplifier (in-phase amplifier) having a gain G, which is used to store the correction voltage for performing the linear interpolation operation. The capacitor 24 used is connected to the output side of the switch 20 and a non-inverting amplifier (common mode amplifier).
21, and between the output side and the input side of the non-inverting amplifier (in-phase amplifier) 21.
A feedback circuit consisting of a series connection circuit of a resistor 22 and a capacitor 23 is provided.

The switch 20 described above is connected to the input audio signal.
During the period corresponding to the position of the pulse noise N1, N2, N3 in Sa, the control signal generation circuit
The switch 20 is turned off by the control signal Sb generated by the CSG, and the switch 20 causes pulse noise N1, N2,
It is turned on during the period when N3 is not present.

Since the output impedance of the amplifier 19 is extremely low, when the switch 20 is turned on as described above, the capacitor 24
The terminal voltage of is equal to the voltage of the input audio signal Sa, and this voltage is outputted to the output terminal 25 via the non-inverting amplifier (in-phase amplifier) 21.

That is, when the switch 20 is turned on as described above, the input side of the non-inverting amplifier (in-phase amplifier) 21 is connected via the switch 20 to the output side of the amplifier 19, which has an extremely low output impedance. Therefore, the feedback circuit consisting of the series connection circuit of the resistor 22 and capacitor 23 connected between the output side and the input side of the non-inverting amplifier (in-phase amplifier) 21 stops operating as a feedback circuit. Therefore, as mentioned above, the terminal voltage of the capacitor 4 connected to the input side of the non-inverting amplifier (common-mode amplifier) 21 is applied to the output terminal 2 via the non-inverting amplifier (common-mode amplifier) 21.
5 is output.

Next, when the switch 20 is turned off by the control signal Sb generated by the control signal generation circuit CSG during the period corresponding to the positions of the pulse noises N1, N2, and N3 in the input audio signal Sa. , the capacitor 24 receives the input audio signal just before the switch 20 is turned off.
The voltage of Sa is stored.

The terminal voltage stored in the capacitor 24 is amplified and outputted by a non-inverting amplifier (in-phase amplifier) 21 with a gain of G, and at the same time, it is outputted by a resistor 22.
The signal is fed back to the input side of the non-inverting amplifier (in-phase amplifier) 21 via a feedback circuit consisting of a series connection circuit of the amp and the capacitor 23. By the feedback operation by the feedback circuit described above, the output voltage of the non-inverting amplifier (in-phase amplifier) 21 is divided by the capacitor 23 and the capacitor 24 and stored in the capacitor 24. is performed repeatedly during the noise period, but since the capacitor 23 and resistor 22 function as a differential feedback circuit, as will become clear from the analysis results described later using mathematical formulas, The circuit between the output side of the switch 20, which is turned off during the period when noise is present, and the output terminal 25 is the same as that in the previously proposed pulse noise reduction device described with reference to FIG. The output signal of the non-inverting amplifier (in-phase amplifier) 21 in the pulse noise reduction device of the present invention shown in FIG. 4 is the signal Sc shown in c in FIG. The input audio signal Sa
The period during which the noise exists is sent to the output terminal 25 as a linearly interpolated signal Sc.

Next, a of FIG. 6 shows a circuit diagram of a circuit portion corresponding to the circuit portion that performs the linear interpolation operation in the pulse noise reduction device of the present invention shown in FIG. 4 described above, and FIG. switch in a of
Referring to Fig. 6 b, etc., which shows the circuit diagram in the frequency domain when the SW is in the OFF state,
The circuit between the output side of the switch 20 and the output terminal 25, which is in an OFF state during the period when noise is generated in the input audio signal Sa, is used to perform the above-described operation during the period when noise is present in the input audio signal Sa. The details of the linear interpolation operation will be explained using mathematical formulas.

First, clarifying the correspondence between each component in the circuit layout shown in FIG. 6a and each component in the circuit layout shown in FIG. In each component, amplifier A1 (a in FIG. 6) and amplifier 19
(Fig. 4), switch SW (a in Fig. 6) and switch 20 (Fig. 4), non-inverting amplifier (in-phase amplifier)
A2 (a, b in Fig. 6), non-inverting amplifier (in-phase amplifier) 21 (Fig. 4), capacitor C1 (a in Fig. 6), capacitor 23 (Fig. 4), capacitor C2 (Fig. 6) a) and capacitor 24 (Fig. 4),
The resistor R (a in FIG. 6) and the resistor 22 (FIG. 4) are
They are compatible with each other.

As mentioned above, when there is no noise in the input audio signal Sa, the switch SW at a in FIG. 6 is in the on state,
The input signal V is applied to the input side of the non-inverting amplifier (in-phase amplifier) A2 via the amplifier A1 and the switch SW, but the switch SW is applied to the input side of the non-inverting amplifier (in-phase amplifier) A2 at the time immediately before noise occurs in the input audio signal Sa. to be turned off.

Now, let us assume that the terminal voltages of capacitors C1 and C2 immediately before the switch SW is turned off are e10 and e20, respectively.
When determining the output signal Vo(s) when the SW is turned off, the output signal Vo(s) is expressed as the following equation (1).

Vo(s)=(R+1/C1S+1/C2S)I(s) +e10/S+e20/S...(1) And the current I(s) flowing through the resistor R1 is I(s)=C1・C2{Vo(s) ) S−e10−e20}/C1+C2
+C1・C2RS…(2) It can be expressed as:

Therefore, the input signal Vi(s) is expressed by the following equation (3).

Vi(s)=C1・Vo(s)S−C1・e10+C2・e20+
C1・C2・RS.e20/S (C1+C2+C1・C2・RS)…(3)
Now, if the gain of the non-inverting amplifier (in-phase amplifier) A2 is G, the output signal Vo(s) will be as shown by the formula Vo(s)=GVi(s)...(4) (4), so As mentioned above (3),
From equation (4), the output signal Vo(s) is expressed by equation (5) below.

Vo(s) = G・(C1・C2・RS＋C2)e20−C1・e10
/S {(1-G)C1+C2+C1・C2・RS}…(5) Here, if capacitor C2 is selected as shown in equation (6), the output signal Vo (s) is
When T1=C1・R, it becomes as shown by the following equation (7).

Vo(s)=G{e20/S+(G-1)e20-e10/(G
-1) T1・S ² } ...(7) If the time just before the switch SW is turned off is t1, the signal voltage is V(t1), so the terminal voltages e10, e20 of capacitors C1 and C2
is expressed by the following equation (8).

e10=(G-1) {V(t1)−T1・V′(t1)} e20=V(t1) …(8) Substituting equation (8) into equation (7) above, the above output signal Vo(s) is expressed by the following equation (9), and when equation (9) is inversely transformed by Laplace transform, it is expressed by equation (10).

Vo(s)=G{V(t1)/S+V'(t1)/S ² }...(9) Vo(t)=G{V(t1)+V'(t1)(t-t1)}...(
10) Since the above-mentioned equation (10) omits the second-order differential term and below of the Taylor series, the linear interpolation circuit in the pulse noise reduction device of the present invention shown in Fig. 4 is as shown in Fig. 4. Non-inverting amplifier (in-phase amplifier)
21 {corresponding to the non-inverting amplifier (in-phase amplifier) A2 shown in a and b of FIG. The capacitance value C2 of the capacitor 23 (corresponding to the capacitor C2) is
Corresponds to capacitor C1 shown in
When the value (G-1) times the capacitance value C1 of the capacitor 24, that is, the capacitance value C2 of the capacitor 24, satisfies the relationship C2=(G-1)C1 shown in the above equation (6), , the slope of linear interpolation is V′(t1), i.e. 1
It can be seen that a linear interpolation operation given by the second-order differential voltage is performed.

(Effects) As is clear from the above detailed explanation, the pulse noise reduction device of the present invention simply attenuates the gain of the transmission system during the period when pulse noise is mixed, or , the signal level during the pulse noise period is maintained at the signal level immediately before the pulse noise, thereby reducing the pulse noise using the conventional method described above. Unlike a reduction device, it also interpolates the signal loss that occurs during periods of pulsed noise, so it is possible to effectively reduce pulsed noise without causing any audible unnaturalness. In addition, compared to the pulse noise reduction apparatus already proposed by the applicant company described with reference to FIGS. 1 to 3, the required linear interpolation operation required in the pulse noise reduction apparatus is Since the pulse noise reduction device can be constructed with a significantly simplified circuit configuration while ensuring the above-mentioned pulse noise reduction devices, it can be provided at a significantly lower cost than the previously proposed pulse noise reduction devices. Therefore, by adopting the pulse noise reduction device of the present invention,
Audio equipment with excellent performance can also be easily provided.

In addition, the pulse noise reduction device of the present invention can effectively reduce ignition noise from automobiles, motorcycles, etc., pulse noise generated from electrical equipment with built-in motors, etc. Of course, it can also be effectively applied to reduce pop noise caused by dust or scratches on an audio disk, drop-out noise that occurs in an audio signal when a video disk signal is lost, and other pulse noises. .

[Brief explanation of the drawing]

Figure 1 is a block diagram of the previously proposed pulse noise reduction device, Figures 2 and 5 are waveform diagrams for explaining operation, Figure 3 is a voltage-current conversion circuit, and Figure 4 is the pulse noise reduction device of the present invention. FIG. 6 is a block diagram of the noise reduction device, and is a circuit diagram for explaining the linear interpolation operation in the pulse noise reduction device of the present invention. 1, 17... Input terminal, 2, 18... Delay circuit, CSG... Control signal generation circuit, 3, 6, 9,
12,19,A...Amplifier, 4,10,20,
SW……Switch, 5, 7, 11, 23, 24,
C1, C2... Capacitor, 8, 22... Resistor,
14, 25... Output terminal, 15, 26... Pulse noise detection circuit, 16, 27... Waveform shaping circuit, 21, A2... Non-inverting amplifier (in-phase amplifier).

Claims (1)

[Scope of Claims] 1. Means for detecting pulsed noise in an input audio signal containing pulsed noise and generating a control signal having a pulse width corresponding to the period during which the pulsed noise occurs; A delay circuit having a control signal generated by the control signal generating means described above in response to pulsed noise in an audio signal, and a delay time approximately equal to the time difference between the control signal and the corresponding pulsed noise. means for delaying an input audio signal containing pulsed noise by;
The aforementioned control signal is supplied as a timing signal for operation, and a signal having slope information of the desired signal during a period in which pulsed noise occurs in the input audio signal is supplied, thereby reducing pulsed noise. A noise reduction device comprising: a linear interpolation circuit configured to perform a linear interpolation operation on a desired signal during a period in which the signal is generated; a switch circuit that interrupts signal transmission during the period in which the signal is being generated;
A first capacitor provided between the signal transmission path and ground between the output side of the switch circuit and the input side of the common-mode amplifier, and the output side of the common-mode amplifier and the input side of the common-mode amplifier. A pulse noise reduction device comprising a series circuit of a second capacitor and a resistor provided between the capacitor and the resistor. 2. A patent claim using a linear interpolation circuit in which the reciprocal of the voltage division ratio of the feedback voltage by the first capacitor and the second capacitor is set equal to the gain of the common-mode amplifier. The pulse noise reduction device according to item 1.