JPS63257338A - Radio communication equipment with small power - Google Patents

Abstract

PURPOSE:To remarkably contrive the reduction of the power consumption during the operation of a small power radio communication equipment by using a 1st detection signal from a 1st detector so as to operate a bit synchronization comparator of a signal processing section and using the 2nd detection signal of a 2nd detector to operate a discrimination code comparator. CONSTITUTION:In receiving a carrier signal lower than a 1st level L by a receiver 3, neither the signal processing of the received data nor transmission is executed and in receiving a carrier signal higher than the 1st level L but lower than a 2nd level H by the receiver 3, a transmitter 4 is not started. Then the 1st detection signal CS-L of a 1st detector 31A starts only a bit synchroniza tion comparator 62A to decide the propriety of the bit synchronization clock of the demodulated data, and when it is decided to be correct, the processing is finished at that time, and when it is decided to be incorrect, the data is stored as a disturbing wave. Since a signal processing section 6 applies no signal processing to discriminate its own station, the power consumption of the receiver is reduced.

Description

[Detailed Description of the Invention] [Summary] A transceiver that receives/transmits a carrier wave signal modulated by attaching a digital station identification code to data, and has two levels of received carrier wave levels, high and low, inside the receiver. II, L
This is a low-power wireless communication equipment that is equipped with two detectors that detect the received carrier wave at a level higher than level II, and performs signal processing for self-station identification and activation of the transmitter only when the received carrier wave is higher than level II. When it is lower than L, neither signal processing nor transmitter activation is performed, and reception (when All transmission is higher than level L and lower than level 11, only the bit synchronization clock of the received data is identified, but the subsequent automatic Signal processing for station identification is not performed to save power consumption of the receiving device.
In addition, information on interference waves and interference waves detected by the two detectors is stored in a memory and transmitted to the other station at the next transmission.

[Industrial application field]

The present invention includes a low-output wireless transmitter that attaches a digital station identification code to transmitted data and modulates the carrier wave, and transmits the wireless carrier signal to the other station; In particular, the radio transmitter is required to be activated only when the radio receiver receives a carrier wave of a specified level or higher, and after waiting for the end of the reception operation. Consider low power wireless communication equipment of approximately IQmW or less.

The present invention relates to the improvement of low-power wireless communication equipment operated under such a promise, and in particular to a circuit configuration for reducing its power consumption. As a low-power wireless IF communication equipment, it goes without saying that signal processing for self-station identification is not performed when the carrier wave received by the wireless receiver is below a specified level4, but when the receiver receives a carrier wave above the specified level, Even if you receive
If it is detected that it is an interference wave that does not have a regular bit synchronized clock or an interfering radio wave of a signal destined for another station that does not have its own station identification code, it can reduce unnecessary operation of the equipment and consume wireless communication equipment. It is desired to reduce power consumption.

[Conventional technology]

FIG. 3 shows a block configuration of a conventional example of the above-mentioned low-power wireless communication equipment.

For example, radio waves with FSX modulation (frequency shift keying modulation) captured by the antenna 1 are received by the receiver 3 via the switch 2, and the received data RD is FSK demodulated by the demodulation section of the modulator 5 and converted into demodulated data. Output. The demodulated data of the modem 5 is input to the signal processing unit 6 and stored in the memory (
RAM) 61A and temporarily stored.

(The ε processing unit 6 also has a memory (ROM) 61B that already stores reference data necessary for comparing the bit synchronization clock of the received data and the comparison of the own station identification code,
The memory (RAM) 61A and the memory (ROM)
) 61B is read out by the detection signal CS of the received carrier wave intensity detector 30 built into the receiver 3, and is subjected to comparison processing by the comparison circuit 62 of the signal processing section 6.

The comparison circuit 62 of the signal processing section 6 includes a memory (RAM) 61
a bit synchronization detector 62A that compares the period of the bit synchronization clock of the demodulated data read from the memory (ROM) 6111 with the period of the reference clock read from the memory (ROM) 6111;
Similarly, memory (RAM) 61A and memory (ROM)
) 61B, the frame synchronization code comparator 62B, system code comparator 6201, and station code comparator 62D sequentially compare the frame synchronization code for self-identification, the system code, and the station code.

When the receiver 3 receives a carrier signal higher than the detection level of the detector 30, the comparison circuit 62 of the signal processing section 6 is activated by the detection signal CS of the detector 30, and the memory (RAM) 6 is activated.
The demodulated data read from 1A is stored in the memory (ROM'
) Sequentially compare and identify with the standard data of 61B.

Then, the comparison circuit 62 outputs the demodulated data identified as acceptable by the last station code comparator 620 to the outside as received data for the own station.

At this time, the detection signal CS of the detector 30 of the reception 4m3 is also input to the transmission control circuit 63 of the signal processing section 6 to generate the start signal PTT, and after the signal processing operation of the reception data is completed, the transmission Start machine 4.

In other words, in conventional low-power wireless communication equipment, when the receiver 3 receives a carrier radio wave lower than the detection level of the detector 30, the detection signal CS remains "mu" and the signal processing for self-station identification is performed. However, when the receiver 3 receives a carrier radio wave higher than the detection level of the detector 30, the detection signal CS
is set to "II" and all comparators 628 to 62D of the comparison circuit 62 of the signal processing section 6 are activated to perform signal processing for self-station identification. At this time, the transmitter 4 In the transmission judgment circuit 63, the activation signal 1'TT is generated by "11" of the detection signal CS of the detector 30 of the reception m3, but the signal processing of the received data in the comparison circuit 62 of the ε signal processing section 6 is completed. and wait for the detection signal CS to be “L”.
After confirming this, the start signal PTT is input to the transmitter 14 to start it up, modulate the transmission data, and transmit it to the partner station.

[Problem that the invention seeks to solve]

Conventional low-power wireless communication equipment, as described above, has a receiver 3.
Each time a carrier wave higher than the prescribed detection level of the detector 30 is received, all comparators 628 to 62D of the comparison circuit 62 of the signal processing section 6 are activated, and the demodulated data is converted to a regular bit synchronized clock. The configuration is such that a comparison and identification operation is performed to determine whether or not the correct local direction that matches is data. However, there are generally many opportunities for the receiver 3 to detect received radio waves at a level higher than the detection level of the detector 30.
After all, the detection level of the detector 30 is adjusted so that the receiver 3 can cope with level fluctuations of the received carrier wave.
This is because it is usually set at a low level close to the usable limit (threshold) of 3.

Therefore, every time the receiver 3 detects a received radio wave with a level higher than the detection level of the detector 30, all the comparators of the comparator circuit 62 of the signal processing section 6 are used to compare the focus synchronization clock and identify the own station. A series of comparison operations is performed each time, and transmission a4 is activated.

The power consumption of the comparison circuit 62 of the signal processing section 6 is
Since the power consumption is approximately the same as the power consumption of the small power wireless communication (i-equipment), the power consumption during operation of the small power wireless communication equipment becomes large (and cannot be ignored).

In addition, even if there are many interfering radio waves or interference waves that are not intended for the own station, although the carrier wave level is higher than the detection level of the detector 30 among the received signals of the reception m3, the data of the interference radio waves and interference waves are recorded. It is also a problem from the point of view of equipment improvement that it is not used for countermeasures.

[Means for solving problems]

The problems with these conventional low-power wireless communication equipment are:
This problem is solved by the present invention whose principle structure is shown in FIG.

In FIG. 1, 1 is an antenna that transmits and receives a radio signal in which a carrier wave is modulated by adding a self-station identification code to data having a constant bit synchronized clock; 2 is a switch for switching between transmitting and receiving radio signals;
3 is a receiver that receives radio No. 18, 31 is a detector that detects the carrier wave level of the received radio signal, and 31A is a detector that detects the carrier wave level of the received radio signal with the first level L, and outputs the first detection signal CS-L. A first detector 3111 outputs a carrier wave level of a received radio signal at a second level 11 higher than the second level L, and a second detector 4 outputs a second detection signal CS-II. 4 is a radio signal. 5 is a modulator and demodulator that modulates the transmitted data and demodulates the received data; 6 a transmitter that transmits the data;
61A is a signal processing unit that logically processes the demodulated data and identifies the received data for the own station and outputs it to the outside, as well as processes the transmitted data and outputs it to the modulation/demodulation unit 5; 61A is a first memory that temporarily stores the demodulated data; 61B is a second storage for storing reference data to be compared with demodulated data; 62 is a first storage 6;
1A is a comparison circuit that reads and compares the storage data of the second memory 61B, and 62A is a bit synchronization comparator that compares the cycle of the bit synchronization clock of the demodulated data with the cycle of the local clock in the comparison circuit 62. 62B is an identification code comparator of the comparison circuit 62 that compares the own station identification code in the demodulated data.

The present invention includes a first detector 31A that detects the received carrier level at a level L as a detector 31 for identifying the carrier level of a wireless signal destined for the own station, and a first detector 31A inside the receiver 3. A second detector 3111 is provided which detects at a second level H which is higher than the first level H of the first detector 31A, and the first detection signal CS-L of the first detector 31A is used to detect the bin in the comparison circuit 62 of the signal processing unit 6. Only the bit synchronization comparator 62Δ for synchronous clock comparison is operated, and the second detection signal CS-I+ of the second detector 31B is used to operate the identification code comparator 62B for self-station identification code comparison of the comparison circuit 62. Features.・[Operation] When the receiver 3 receives a carrier wave higher than the detection level L and higher than the second level 11, the first detector 31A outputs the first Vti output signal CS, and 2 detector 3111 outputs a second detection signal CS-11.

The first detection signal CS-L of the first detector 31A activates the comparison circuit 620 bit synchronous comparator 62A of the signal processing section 6, and the bit synchronous comparator 62A activates the 11th C!C! The period of the bit synchronization clock of the demodulated data input from the storage device 61A is compared with the period of the reference bit synchronization clock input from the second storage device 31B, and a Q comparison is made to determine whether the received data has a correct bit synchronization clock. Make identification.

The second detection signal CS-11 from the second detector 311N activates the identification code comparator 62B of the comparator circuit 62 to compare and identify the own station identification code in the same manner. Output to outside. At this time, the second detection signal CS-11 is also input to the transmission determination circuit 63 to generate the activation signal PTT, and after the reception operation is completed, the second detection signal CS-11 is
After confirming that the transmission of S-H has stopped, the start signal 1'TT is connected to the transmitter 4, the transmitter 4 is started, and the transmission data of the local station is transmitted to the other station. In addition, the bit synchronization comparator 62
If it is determined that the correct bit synchronization clock is not present at Δ, that is, the determination result is negative, the demodulated data at that time is determined to be an interference wave and is stored in the first memory H61A.

Further, when the determination result of the identification code comparator 62B is negative, the demodulated data at that time is determined to be a data interference wave for other stations and is stored in the first storage GIA.

Then, the above-mentioned interference wave and interference wave data stored in the first storage device 61A are modulated together with the own station's transmission (i data) and sent to the other station at the next transmission.

Next, when receiving a carrier wave whose reception (fi3 is higher than the second level L but lower than the second level 11), the second detector 31
The detection signal CS-11 of B is not output and the first detector 31
Only the detection signal 05-L of A is output.

Since the detection signal CS-I+ of the second detector 31B is not output, the transmitter 4 is not activated, and the detection signal CS7L of the first detector 31A is transmitted to the focus synchronization comparator 6 as described above.
2A is activated, it is determined whether the demodulated data is a signal with a correct bit synchronization clock, and if it is determined that the demodulated data has a correct bit synchronization clock, the processing is immediately terminated.

If the bit synchronization comparator 62A determines that there is no correct bit synchronization clock, that is, the determination result is negative, the demodulated data at that time is determined to be an interference wave and is stored in the first memory 61A. The interference wave data stored in the first memory 61A is then modulated together with the own station's transmission data and sent to the other station during the next transmission.

Next, when the receiver 3 receives a carrier wave lower than the second level L, neither the first detection signal CS-L of the first detector 31A nor the second detection signal CS-II of the second detector 31111 is output. Therefore, neither the bit synchronization comparator 62A nor the identification code comparator 62B of the comparison circuit 62 of the signal processing section 6 operates, and the transmitter 4 is also not activated.

In the circuit configuration of the present invention, when the receiver 813 receives a carrier wave signal lower than the level L, it performs neither signal processing nor transmission operation of the received data, and the receiver 3 receives a carrier wave signal higher than the level L but at the second level II. When receiving a lower carrier signal, the transmitter 4 is not activated, and the first detection signal CS-L of the first detector 31A activates only the bit synchronization comparator 62A, so that the bit synchronization clock of the demodulated data is It is determined whether it is correct or not, and if it is judged to be correct, the process is terminated, and if it is judged to be incorrect, the data at that time is stored as an interference wave. Since the signal processing unit 6 does not perform signal processing for identifying its own station, the power consumption of the receiving device is reduced and one of the problems is solved.

Further, when the received data is determined to be rejected by the identification code comparator 62B of the comparison circuit 62 of the signal processing section 6, the demodulated data at that time is stored as a signal interference wave for other stations, and the above-mentioned interference is stored. The data of the wave or Qfl signal can be read out during the next transmission, combined with the original transmission data, modulated, and sent to the other station for use.

Therefore, another problem is solved that even though jamming waves and interference waves are detected, their data is recorded and not used for countermeasures.

〔Example〕

FIG. 2 is a block diagram showing the configuration of a low-power wireless communication equipment according to an embodiment of the present invention.

Circuits with the same numbers in FIG. 2 as those in FIG. 1 have the same circuit functions as described with respect to FIG.

The first detector 318 of the receiver 3 is composed of a differential amplifier, and its reference level L is set to a level L defined by low power radio equipment, and receives a carrier wave higher than the reference level L. When doing so, the first detection signal CS-L is output.

The second detector 31B of the receiver 3 is also composed of a differential amplifier,
The reference level H is set to a second level I+ higher than the -th level L, and when a carrier wave higher than the second level H is received, a second detection signal CS-1 is output.

The first storage 61A of the signal processing unit 6 is a random access memory R that temporarily stores demodulated data from the modulation/demodulation unit 5.
The second storage device 61B is made up of a read-on, read-only memory 110M that stores data as a comparison reference for the comparison circuit 62 in advance.

Bit synchronization comparator 62A of comparison circuit 62 of signal processing unit 6
The demodulated data is determined by comparing the bit period of the demodulated data temporarily stored in the RAM of the first storage device 61A with the period of the standard own-station bit synchronization clock stored in the ROM of the second storage device 61B. It is comprised of a bit synchronization detector 62A1 that determines whether or not the bit period is correct. The identification code comparator 62B of the comparison circuit 62 of the signal processing unit 6 is composed of a frame synchronization comparator 6zni for self-station identification, a system code comparator 62B2, and a station code comparator 62B3. 1st ia storage device 61A
The frame-identical-1-1 code pattern of the demodulated data temporarily stored in the RAM is stored in the second tα unit 61B, and the local station is identified by comparing it with the synchronization code/pattern of the frame to which the data belongs, and the system The code comparator 62B2 compares and identifies the system code of the system to which the local station belongs in a similar manner, and finally the station code comparator 62B3 compares and identifies the station identification code of the local station in the same manner. When the final determination result of the station code comparator 6283 is yes, the data read from the RAM of the first memory 61A at that time is outputted to the outside as received data.

To explain the overall operation of the circuit of this embodiment, a code-modulated carrier signal captured by the antenna 1 is received by the receiver 3 via the switch 2, and the receiving IS data is transmitted to the demodulator of the modem 5. It is demodulated by

The demodulated data of the modulator/demodulator 5 is input to the signal processing unit 6, and the l? The demodulated data temporarily stored in the RAM of the first memory 61A is the first detection signal CS-L of the first detector 31A of the receiver 3 and the second detector 31B. The second detection signal CS-H is read out to the comparison circuit 62 of the signal processing section 6. At the same time, the comparison circuit 62 of the signal processing section 6
The reference data stored in the OM is read out and both successive data are compared.

The comparison circuit 62 consists of a bit synchronization comparator 628 and an identification code comparator 62B, the bit synchronization comparator 62Δ is composed of a bit synchronization detector 62A1, and an identification code comparator 6211.
- is frame synchronization comparator 62111. System code comparator 6282. It is composed of a station code comparator 62B3.

The bit synchronization detector 62^ of the comparison circuit 62 is the first detector 3
The bit period of the demodulated data that is started by the first detection signal CS-L of 1A and is read from the RAM of the first storage 61A is compared with the period of the reference bit synchronization clock that is read from the ROM of the second storage 61H. Then, it is determined whether the signal has the correct bit synchronous clock or not. If it is determined that the signal has the correct bit synchronous clock, the processing is terminated. If it is determined that the signal is not the correct bit synchronous clock,
The demodulated data at that time is written and stored in the RAM of the first storage device 61A as an interference wave.

A frame synchronization comparator 6 of an identification code comparator 62B of a comparison circuit 62 for selecting data for the local station from received data.
2B1. System code comparator 62B2. The station code comparator 62B3 receives the second detection signal CS of the second detector 31B.
-11, but the frame sync comparator 628
1 is the first memory 'J:! The frame synchronization code pattern in the repeat J data read from the RAM of 61A is stored in the second memory 61B. The local station read from the OFI is compared with the frame synchronization code pattern of the data to determine whether there is a loss or not. Similarly, the system code comparator 62B2 compares the system code in the demodulated data sequentially outputted from the RAM of the first memory 61A with the system code of the own station read from the ROH of the second memory 2561B, and determines whether or not they match. Determine whether

The station code comparator 62B3 inputs the I? A
The station code in the demodulated data read from M is compared with the station code of the own station read from the ROM of the second storage device 6111, and it is determined whether or not there is a loss. Then, the demodulated data when the determination result of the last station code comparator 62B3 is OK is outputted to the outside as received data by the local station.

Also, at this time, the detection output of the station code comparator 62B3 is converted into the second detection signal CS-I+ of the second detector 31B in the AND gate constituting the transmission determination circuit 63 of the signal processing section 6.
After the receiving operation is completed, the transmitter 4 is activated by turning on the activation signal PTT.

If the determination result of the bit synchronization comparator 62A of the comparison circuit 62 is yes, and the determination results of the frame synchronization comparator 62B1 and the system code comparator 62B2 of the identification code comparator 62B are negative, the demodulated data at that time is For other systems, it is stored as a signal interference wave, and the comparison circuit 6
The determination result of the second bit synchronization comparator 62A is OK;
If the determination result of the station code comparator 62B3 is negative, the demodulated data at that time is stored in the first memory 61A as a signal interference wave for other stations in the own system, and is transmitted to the next transmitter 4.
When starting up, the combining circuit 64 combines the data transmitted from the own station and transmits it to the other station.

As is clear from the above description, in the low power wireless communication equipment of this embodiment, when the level of the carrier wave received by the receiver 3 is lower than the detection level L of the first detector 31A, the signal processing unit 6 All of the comparison circuits 62 are rendered inactive, and the transmitter 4 is also not activated.

Furthermore, when receiving a carrier wave that is higher than the detection level L of the first detector 31A and lower than the detection level 11 of the second detector 31B, which is received frequently, the bit Only the synchronization comparator 62A is operated, and the frame synchronization comparator 62 of the identification code comparator 62B is operated.
Bl, system code comparator 62B2, and station code comparator 62B3 are made inactive.

At this time, the transmitter 4 also remains inactive.

Then, when the level of the carrier wave received by the receiver 3 is higher than the detection level 11 of the second detector 31B, all the comparators of the comparison circuit 62 of the signal processing section 6 are operated for the first time to perform signal processing for identifying the own station, The second detector 311 in the transmission judgment circuit 63
1 detection signal CS-H and the station code comparator 62B3 of the comparator circuit 62 generate a start signal PTT, and after the receiving operation is completed, it is confirmed that the sending of the detection signal CS-11 of the second detector 31B has stopped, and then the start signal is started. Enter No. 18 PTT into send m4,
Activate transmitter 4.

Frame synchronization comparator 62 of comparison circuit 62 of signal processing section 6
81. The total power consumption of the three circuits, system code comparator 62B2 and station code comparator 62B3, is a transmission output of 10 m.
Since the power consumption is almost the same as the power consumption of the transmitter 4 of W, the power consumption is higher than the detection level L of the first detector 31A and lower than the detection level 11 of the second detector 31B. When radio waves are received with interference, the fact that these three circuits become inactive, together with the fact that the transmission@4 becomes inactive, contributes to significantly reducing the power consumption of wireless communication equipment compared to the conventional technology.

Further, each comparator of the comparison circuit 62 determines that the first memory 6
The data on interference waves and interference waves stored in the 1A RAM is
This is useful because it is combined with the own station's data and transmitted to the other station during the next transmission, and can be used as a countermeasure against interference.

〔Effect of the invention〕

As explained above, according to the present invention, the power consumption during the operation of low-power wireless communication equipment can be significantly reduced, and jamming waves and interference waves can be recorded and transmitted to the other station during the next transmission. The results can also be used as materials for equipment improvement.

[Brief explanation of drawings]

FIG. 1 is a principle block diagram showing the configuration of a low-power wireless communication facility according to the present invention. FIG. 2 is a block diagram showing the configuration of a low-power wireless communication facility according to an embodiment of the present invention. FIG. 3 is a conventional example. FIG. 2 is a block diagram of a low-power wireless communication facility. 1 and 2, 1 is an antenna, 2 is a switch, 3 is a receiver, 31 is a detector, 31A is the first detector, 31B is the second detector, 4 is a transmitter, 5 is modulation/demodulation 6 is a signal processing unit, 61A is a RAM of the first memory, 61B is a ROM of the second memory, 62 is a comparison circuit, 62A is a bit synchronization comparator, 62A1 is a bit synchronization M detector, [i2B 62111 is an identification code comparator, 62111 is a frame synchronization code comparator, 62B2 is a system code comparator, 62B3 is a station code comparator, 63 is a transmission determination circuit, and 64 is a data synthesis circuit.

Claims (1)

[Claims] A receiver (
3), a transmitter (4) that transmits transmission data to a partner station based on a detection signal CS of a detector (31) that identifies the strength of a carrier signal received by the receiver (3) at a predetermined level; a modulation/demodulation section (5) that demodulates the received data of the device (3) and modulates the transmission data; a first storage (61A) that temporarily stores the demodulated data of the modulation/demodulation section (5); A second memory (61B) that already stores reference data to be compared with the output of the first memory (61A) and the first memory (61A).
a bit synchronization comparator (62A) that reads out the data stored in 61A) and the data stored in the second storage device (61B) using the detection signal CS of the detector (31) and compares the period of the bit synchronization clock of the demodulated data; Identification code comparator (62B) that compares own station identification codes and outputs data for own station
In the low-power wireless communication equipment, the detector (31) of the receiver (3) detects the strength of the received carrier signal at a first level L, and 1 detection signal CS-L
a first detector (31A) that outputs a signal, and a second detector (31B) that detects at a second level H higher than the first level L and outputs a second detection signal CS-H; vessel(
The bit synchronization comparator (62A) of the signal processing section (6) is operated by the first detection signal CS-L of
A low-power wireless communication facility characterized in that an identification code comparator (62B) is operated by a second detection signal CS-H of a detector (31B).