JPS63272196A - Video signal recording and playback device - Google Patents

Abstract

PURPOSE:To obtain a video signal free from time base variance component (jitter) and Y-C timing deviation by controlling the extent of delay of a phase synchronizing clock signal with information obtained from a sampling error signal to generate a sampling clock signal which is used to digitally convert a reproduced signal. CONSTITUTION:Means 6-8 which digitally convert the reproduced signal, a means 9 which obtains the sampling error signal from digitally converted sampling reference signal data, and a means 11 which controls the extent of delay of the phase synchronizing clock signal by information obtained from the sampling error signal to generate the sampling clock signal used for digital conversion are provided. Thus, sampling is performed at an accurate timing even in case of the variance of characteristics and the adjustment error due to characteristic insufficiency of circuit elements and temperature, and the deviation of the timing of the reproduced signal is automatically eliminated.

Description

Detailed Description of the Invention Industrial Field of Application The present invention (ζ) converts the time axis of at least one of the luminance signal and color signal of a video signal and time-division multiplexes it within one horizontal scanning period to generate a TCI signal ( Time Compressed
Integration (hereinafter referred to as a time-division multiplexed signal of a luminance signal with a color signal is referred to as a TCI signal), and inversely converts it during playback to obtain a playback signal. In addition to removing error components, the reproduced TCI signal is sampled at accurate timing, and the timing difference between the reproduced luminance signal and the reproduced color signal is automatically adjusted.

Conventional technology Conventionally, a luminance signal Y of a video signal and two color signals (CI, C
2) is compressed on the time axis and time division multiplexed (TCI processing)
The following procedure was used to record and reproduce information on a magnetic recording and reproducing device. During recording, the horizontal synchronization signal is separated from the video signal, and P L L (Phas
two clock signals fY of a predetermined frequency phase-synchronized with the video signal using a Locked Loop);
Get fc. The Y signal is digitally converted by a clock signal fy in a first A/D converter, and the C1 signal and C2 signal are digitally converted by a clock signal (C) in second and third A/D converters, respectively. These digitally converted video signals are each written into a memory or the like, compressed on the time axis by changing the writing and reading clock frequencies, and time-division multiplexed at a predetermined timing within one horizontal scanning period of the video signal. Ru.

Further, a horizontal synchronization signal and a burst signal, which serve as a time reference during reproduction, are added to form a recording TCI signal.

When playing back, perform the operations opposite to when recording. A burst gate pulse is generated by detecting the horizontal synchronization signal of the regenerated TCI signal, and the band is limited by a bandpass filter.
Extract the improved burst signal of i'J. A phase synchronized clock signal and a reproduced horizontal scanning reference position signal are obtained using the phase of this burst signal as a reference. The phase-synchronized clock signal is counted from the reproduced horizontal scanning reference position signal, and a first counting interval is set as a multiplexed interval for the color signal C1, a second counting interval is set as a multiplexed interval for the color signal C2, and a third counting interval is determined. In this method, a reproduced luminance signal and a reproduced chrominance signal are obtained by expanding the time axis of each multiple section of the luminance signal Y using a sampling memory.

Problems to be Solved by the Invention However, in the above signal processing, the reproduction TCI
Since the signal processing system that separates the signal from the signal to obtain a phase-synchronized clock signal is different from the system that performs A/D conversion, it is necessary to use a bandpass filter to improve the S/N of the burst signal or to limit the band of the reproduced TCI signal. If there are variations in the group delay characteristics of the low-pass filter used or changes due to temperature characteristics, or if the frequency of the burst signal changes during special playback, and the group delay characteristics of the band-pass filter are flat, the phase synchronized clock Since the relative delay time between the signal processing system that obtains the signal and the system that performs A/D conversion changes, the actual timing of digital conversion of the reproduced TCI signal and sampling of multiplexed sections of the luminance signal Y9 color signals CI and C2 change. The timing is off. For this reason,
There is a major problem in that a difference (y-(: timing shift)) occurs in the time axes of the reproduced luminance signal and the reproduced chrominance signal on the original time axes whose time axes have been expanded.

Figure 5 shows the signal processing system that obtains the phase synchronized clock signal and the A/
Y- when the relative delay time with the D-converting system changes
FIG. 3 is a waveform diagram illustrating a shift in C timing. During recording, it is ideal that the luminance signal Y is time-axis compressed to 315 and divided into sections, and the color signals CI and C2 are time-axis compressed to 1/6 and time-division multiplexed into one section and section ■. , it is assumed that the extraction timing during playback is delayed by τ time. In this case, the sampling timings of the multiplexed sections of the luminance signal Y9 and the color signals CI and C2 are L sections shifted by τ time, respectively.
In the M and N sections, the luminance signal is expanded by 5/3 and the color signal is expanded by 6 times from the sampling start position, so 0, P, and Q, which were signals at the same time at the time of input, are is output at a time shifted by (6τ-6τ/3)=10τ/3.

In view of these points, the present invention digitally converts video signals with accurate sampling timing even when there are variations in filters, adjustment errors, characteristic fluctuations due to temperature characteristics, and special playback, and eliminates time axis fluctuation components (jitter). Y-C
It is an object of the present invention to provide a recording and reproducing device for video signals without timing deviation.

Means to Solve the Problem When recording and reproducing by time-division multiplexing at least one of the luminance signal and color signal of the video signal by varying the time 11] within one horizontal scanning period, the horizontal means for inserting a horizontal synchronization signal and a burst signal at a predetermined position within a scanning period;
means for inserting a sampling reference signal at a predetermined position of the recording signal; means for recording and reproducing the recording signal on a recording medium; and generating a burst gate pulse by separating the horizontal synchronization signal inserted at the time of recording from the reproduction signal. means for separating burst signals using the burst gate pulse; means for generating a clock signal of a predetermined frequency; and means for delaying the clock signal to generate a phase synchronized clock signal synchronized with the phase of the burst signal. means for generating the signal; and means for digitally converting the reproduced signal.
means for obtaining a sampling error signal from digitally converted sampling reference signal data; and means for controlling the delay amount of the phase synchronized clock signal using information obtained from the sampling error signal to generate the sampling clock signal to be digitally converted. A video signal processing device characterized in that it has at least the following.

According to the above-described configuration, the present invention obtains a phase synchronized clock signal that follows at high speed using a burst signal inserted into a TCI signal, and adjusts the sampling timing of a sampling reference signal that is A/D converted in the same system as the TCI signal. Since the sampling clock signal is controlled to a predetermined timing, time axis fluctuation components can be removed to a high degree of accuracy, and sampling can be performed at accurate timing even if there are insufficient characteristics of circuit elements, characteristic fluctuations due to temperature, or adjustment errors. It is possible,
It is possible to automatically remove timing deviations of reproduced signals.

Embodiment FIG. 1 is a block diagram of a video signal recording and reproducing apparatus in an embodiment of the present invention. In the figure, 1 is the first input terminal to which the luminance signal Y is input, 2 is the second input terminal to which the color signal C1 is input, 3 is the third input terminal to which the color signal C2 is input, and 4 is the luminance signal. a synchronization signal separation circuit 5 for separating a horizontal synchronization signal from the synchronization separation circuit 4; Signal fcSTCI Clock signal fTc
1. and a first clock signal generation circuit 6.7.8 that generates fH indicating the reference position of each horizontal scanning period, first, second, and
The third A/D converter, 9, consists of a RAM (random access memory) and an address counter.
The digitally converted Y and CI, 02 are converted into the clock signals fY and f, respectively, in one horizontal scanning unit. A TCI encode circuit 1o is composed of a ROM (read only memory) and a counter, and is outputted from the TCI processing circuit 9. 11 is a ROM; 11 is a ROM; 11 is a ROM;
12 is a D/A converter that converts the TCI signal into analog, and 13 is an F.
M modulator, 14 recording amplifier, 16 magnetic head, 16 magnetic tape, 17 head amplifier, 18i
l-iFM demodulator; 19, a low-pass filter that limits the band of the demodulated reproduced TCI signal; 2o, a fourth A/D converter that converts the band-limited TCI signal into digital; 21, the band-limited TCI signal; A burst gate pulse generation circuit separates the horizontal synchronization signal from the TCI signal by level comparison and generates a burst gate pulse. 22 is the timing of the burst gate pulse after band-limiting the reproduced TCI signal with a bandpass filter that tosses the burst frequency with the center frequency. a burst signal detection circuit 23 for extracting a reproduced burst signal at a PLL configuration; a second clock signal generation circuit 24 for oscillating at a frequency synchronized with the detected burst signal and outputting a TCI clock signal 'TCI; consists of a phase comparison circuit, a delay circuit, and a selection circuit, and detects the phase of the burst signal detected by the burst detection circuit among the delayed clock signals obtained by sequentially delaying the TCI clock signal listed in 11iJ from the second clock signal generation circuit 23. a phase synchronized clock signal generation circuit which selects a delayed clock signal with a phase closest to the phase synchronized clock signal and outputs a phase synchronized clock signal, and also outputs a reproduced horizontal scanning reference position signal which is a reference position of the reproduced TCI signal; 26 is the digital conversion circuit; The time difference from the reproduction horizontal scanning reference position to the reference phase point of the sampling reference signal is detected from the reproduced TCI signal data, and the time difference detected M times is smoothed to obtain a signal in units of 1/L clock of the phase synchronized clock signal. Sampling error signal CnzAnXL+Bn converted to time difference
[1/L clock] An; error in clock units Bn; sampling error detection circuit that outputs an error in 1/L clock units; Delay by L clocks until time N
The differential components of the sampling error signal, that is, the error signal CN at the current time and the previous error signal CN-1,
A clock delayed by the difference ΔCN=CN-CN-1 (advanced depending on the sign of ΔCN) is selected and output as a sampling clock signal, and a corrected reference position signal delayed by AN clocks from the horizontal scanning reference position signal is output. The output sampling clock generation circuit 27 consists of a RAM and a RAM control circuit, and counts from the timing of the correction reference position signal to output the first predetermined section as the color signal C1, the second predetermined section as the color signal C2, and the third predetermined section as the color signal C1. A predetermined section is written to RAM as a luminance signal Y, and a color signal C is written.
1°C2 is a TCI decoding circuit that reads out the luminance signal Y using a clock signal fY, expands the time axis, and outputs it; 28, 29.30 indicates Y and CI that are output from the TCI decoding circuit, respectively. ,C2
second, third, and fourth D/A converters that convert the
Reference numerals 31, 32, and 33 are second, third, and fourth output terminals that output the reproduced luminance signal Y, reproduced color signal C1, and reproduced color signal C2, respectively. In some of the figures, the pre-filter of the A/D converter and the post-filter of the D/A converter are omitted.

FIG. 2 is an operational waveform diagram illustrating the operation of this embodiment.

In the figure, 34 is the input luminance signal Y, 35 is the input color signal C1, 36 is the input color signal C2, and 37 is the l'cI signal output from the TCI encoder circuit 9, and the horizontal synchronization signal, burst signal, and sampling reference signal. FIG. 3 is a waveform diagram of a divided and multiplexed recording TCI signal. In the figure, the C section is the C1 signal, the B section is the C2 signal, the C section is the Y signal, the C section is the horizontal synchronization and burst signal, and the E section is the sampling reference signal.

FIG. 3 is a waveform diagram of the sampling reference signal inserted into section E in this embodiment. In the same figure, the black circle is the reference phase point of the sampling reference signal, and the white circle o is the clock signal fT.
At the reference sampling point sampled by c l, the amplitude F is smaller than the maximum amplitude of the video signal, and the signal band is narrower than or equal to the band of the recorded TCI signal.

FIG. 4 is a waveform diagram of the reproduced sampling reference signal 4o sampled by the fourth A/D converter 20. In the figure, the black circle . is the reference phase point of the sampling reference signal, the white circle O is the sampling point actually sampled with the A/D clock signal fTc,', and .DELTA.G is the sampling phase error within one clock.

The operation of this embodiment configured as above will be explained.

The luminance signal input from the input terminal 1 is input to the synchronization separation circuit 4, where the horizontal synchronization signal is separated. The clock signal generation circuit 6 generates a sampling clock signal fY of a luminance signal whose phase is synchronized with the separated horizontal synchronization signal, a sampling clock signal fc of a chrominance signal fc, a TCI clock signal f which is a read clock of the RAM, and a sampling clock signal f of the input horizontal scanning period. Generate fH indicating the reference position CI. The first, second and third A/D converters 6, 7.8 each digitally convert the luminance signal Y2 color signal C19 color signal C2 and output it to the f'cI code circuit 9. The TCI encode circuit 9 writes the digitally converted Y, CI, and C2 into the RAM using the clock signals fY and fc, respectively, in units of one horizontal scan, reads them out using the clock signal fTCI, and compresses the time axis into one horizontal scan period. Time division multiplexing. The synchronization signal insertion circuit 10 synchronizes the address counter with the reference position fH of the input horizontal scanning period, counts the clock signal, addresses a ROM that stores horizontal synchronization signals and burst signals in advance, and generates them for a predetermined period. Time division multiplexing is performed on the TCI signal output from the TCI processing circuit 9. The timing reference signal insertion circuit 11 similarly inserts a timing reference signal into a predetermined position and outputs a recording TCI signal. Recording TCI signal D/A
It is converted into analog by a converter 12, band-limited (not shown), then FM modulated by an FM modulator 13, and then sent to a recording amplifier 14. It is recorded on the magnetic tape 16 via the magnetic head 16.

The reproduced FM signal reproduced from the magnetic head 16 is FM demodulated by the FM demodulator 18 via the head amplifier 17, and the reproduced TCI signal whose band is limited by the low-pass filter 19 is digitalized by the fourth A/D converter 20. converted. Further, the reproduced TCI signal is input to a burst gate pulse generation circuit 21 and a burst signal detection circuit 22. A burst gate pulse generation circuit 21 separates the horizontal synchronizing signal and generates a burst gate pulse used in a burst detection circuit 22. The burst detection circuit 22 is a reproduction TCI
After band-limiting the signal with a bandpass filter having the burst frequency as its center frequency, the burst signal is extracted and output to the phase synchronized clock signal generation circuit 24. The phase synchronized clock signal generation circuit 24 selects the delayed clock signal whose phase is closest to the phase of the detected burst signal from among the delayed clock signals obtained by sequentially delaying the clock signal inputted from the second clock signal generation circuit 23. It outputs a phase-synchronized clock signal as well as a reproduced horizontal scanning reference position signal which is the reference position of the reproduced TCI signal. The sampling error detection circuit 26 detects a point (for example, white circle QC in FIG. 4) where the sampling value increases from the sampling point of the continuous reference signal of the digitally converted TCI signal data, and marks the sampling point white circle ○.
V.

Determine c', d', e', f' and mark the sampling points as white circles ○a/. From the level values of l and f/, Bn=ΔG+IL [1/L clock]ΔG=2・
ΔH/(f'-a') (clock) ΔH=((f'
+a')/2) -Detect the sampling phase error Bn in 1/L clock units given by -c' and the number of clocks An from the reproduction horizontal scanning reference position to the white circle □c/,
The M detection time differences are smoothed using a digital filter to obtain a sampling error signal (CN = AN x L
+BN) to the sampling clock generation circuit 26.

The sampling clock generation circuit 26 sequentially delays the phase synchronized clock signal by 1/L clock, and generates a signal whose phase is further delayed by ΔCN/L clock phase, which is the difference component of the sampling error signal, than the currently selected delay clock. (advanced one depending on the sign of ΔCN) and outputs it as a sampling clock signal,
A corrected reference position signal delayed by AN clock from the horizontal scanning reference position signal written in OiJ is output. That is, the feed bank is applied so that the difference component ΔCN of the mI sampling error signal becomes zero. The TCI decoding circuit 27 is composed of a RAM and a RAM control circuit, and calculates a first predetermined section from the timing of the correction reference position signal as a color signal C1, a second predetermined section as a color signal Ca, and a third predetermined section. The luminance signal Y
The color signals CI and C2 are read out using the clock signal fc, and the luminance signal Y is read out using the clock signal fY, expanded on the time axis, and output. 2nd, 3rd, 4th D/A'& exchanger 2 s I 29 + 3 o
Ha, that's all, n'rIki Y.

Convert CI and C2 to analog and output terminals 31, 32°3
Output each to 3.

As explained above, according to this embodiment, during the time when the luminance signal and two color signals of the video signal are subjected to TCI processing and recorded,
A horizontal synchronization signal, a burst signal, and a sampling reference signal are inserted and recorded at the timing of the horizontal scanning period, and a clock signal whose phase is synchronized with the detected burst signal during playback is obtained, and further processed by the same signal processing system as the TCI video signal. Since the reproduced sampling reference signal to be generated is controlled to be sampled at a predetermined timing, a phase synchronized clock signal can be obtained in instantaneous phase synchronization with a reproduced burst signal from which noise components have been sufficiently removed. The timing offset component between the signal generation system and the video signal digital conversion system can be controlled and removed from the data of the reproduced sampling reference signal processed by the same processing system as the video signal. Therefore, even if there are variations in circuit elements, characteristic fluctuations due to temperature, or adjustment errors,
Furthermore, even during special reproduction, it is possible to automatically remove timing deviations and time axis fluctuation components between the reproduced luminance signal expanded in the time axis and the reproduced color signals C1 and 02 due to sampling timing deviations.

In this example, the sampling reference signal was inserted into all horizontal blanking periods, but the timing offset component between the system that generates the phase-synchronized clock signal and the system that digitally converts the video signal can be eliminated by low-speed processing. Since it can be removed, it may be inserted within the vertical blanking period or at other periodic intervals. In addition, in this embodiment, Y, C1, and C
The explanation was given using the case where C1 and C1 are subjected to TCI processing.
It goes without saying that the effects of this embodiment do not change in any way even when TCI processing is performed on color signals and luminance signals obtained by line-sequentializing C2 and C2.

DETAILED DESCRIPTION OF THE INVENTION According to the present invention, when a luminance signal and two color signals of a video signal are subjected to TCI processing and recorded, a horizontal synchronizing signal, a burst signal, and sampling are performed at a predetermined timing of a horizontal scanning period. Insert and record a reference signal, and when playing back,
A phase-synchronized clock signal that is instantaneously phase-synchronized with the burst signal is obtained, and the time axis fluctuation component of the reproduced signal is removed.
The reproduction sampling reference signal processed by the CI video signal processing system is fed back so that it is sampled at a predetermined timing, and the time difference between the system that generates the phase synchronized clock signal and the system that digitally converts the video signal is Because offset components can be removed, even if there are variations in circuit elements, characteristic fluctuations due to temperature, adjustment errors, or even during special playback, the reproduced luminance signal and reproduced time axis are stretched due to sampling shifts. Color signal C1
It is possible to automatically remove the timing deviation between and 02 and time axis fluctuation components with high precision, and its practical effects are very large.

[Brief explanation of the drawing]

FIG. 1 is a block diagram of a video signal recording and reproducing apparatus in an embodiment of the present invention, FIG. 2 is an operational waveform diagram in the embodiment, and FIG. 3 is a waveform diagram of a sampling error reference signal in the embodiment. ? Figure JJ4 is a waveform diagram of the sampling error reference signal sampled during playback in the same example.
FIG. 6 is a waveform diagram for explaining problems in the conventional example. 9...TCI encode circuit, 11...
- Sampling reference signal insertion circuit, 22... Burst detection circuit, 24... Phase synchronized clock signal generation circuit, 26... Sampling error detection circuit, 26... - Sampling clock signal generation circuit, 27...TCI decoding circuit. Name of agent: Patent attorney Toshio Nakao and 1 other person 2nd
Figure 3 Figure 5

Claims (4)

[Claims] (1) When recording and reproducing by converting the time axis of at least one of the luminance signal and color signal of the video signal and time-division multiplexing within one horizontal scanning period, the means for inserting a horizontal synchronization signal and a burst signal at a predetermined position; means for inserting a sampling reference signal at a predetermined position of the recording signal; means for recording and reproducing the recording signal on a recording medium; means for separating a horizontal synchronizing signal inserted during recording to generate a burst gate pulse; means for separating a burst signal using the burst gate pulse; means for generating a clock signal of a predetermined frequency; and delaying the clock signal. means for generating a phase synchronized clock signal synchronized with the phase of the burst signal, means for digitally converting the reproduced signal, means for obtaining a sampling error signal from the digitally converted sampling reference signal data, and the sampling error. 1. A video signal recording and reproducing apparatus comprising at least means for generating a sampling clock signal for digitally converting the reproduced signal by controlling the delay amount of the phase synchronized clock signal using information obtained from the signal. (2) The sampling reference signal is a signal consisting of two constant level sections from the black level to the white level of the luminance signal and a section where the level sections rise or fall. A video signal recording and reproducing device as described in 2. (3) The video signal recording and reproducing apparatus according to claim 1, wherein the signal band of the sampling reference signal is equal to or smaller than the signal band of the time-axis converted luminance signal or chrominance signal. (4) The video signal recording and reproducing apparatus according to claim 1, wherein the sampling error signal is generated from a smoothed sampling error detected a predetermined number of times.