JPS6328058A - Integrated circuit device - Google Patents

Abstract

PURPOSE:To enable substrate potential to quickly become of a constant value when the power is turned on, by providing a flip flop which can control control- circuit operations at that time. CONSTITUTION:A flip flop 5 is designed not to operate a controlling circuit 3 in its initial state. when the source is turned on, therefore, the second high- power circuit 2 for substrate-bias generation can be operated until a reset signal is applied to the reset terminal 6 in this flip flop 5. Substrate potential can be quickly made to become a constant value by operating the second high-power circuit for substratebias generation in accordance with the initial state of the flip flop 5 when the power is turned on.

Description

DETAILED DESCRIPTION OF THE INVENTION Field of the Invention The present invention relates to an integrated circuit device equipped with a substrate bias generation circuit.

2. Description of the Related Art Conventionally, LSI circuits are often equipped with a substrate bias generation circuit in order to improve characteristics such as reducing junction capacitance. However, in recent years, with the increasing demand for lower power consumption, reducing the power consumption of the substrate bias generation circuit itself has become a major issue. Conventionally, devices with such performance have had two substrate bias generation circuits with different capabilities, and depending on the operating state of the main LSI circuit, one of the two substrate bias generation circuits with the greater capability is selected. There is a substrate bias generation circuit that reduces power consumption by being turned on and off by a control circuit.

An example in which the above-described conventional substrate bias generation circuit is applied to a dynamic memory will be described below with reference to the drawings.

FIG. 2 is a block diagram showing the configuration of a conventional substrate bias generation circuit. 1 is a first substrate bias generation circuit; 2
3 is a second substrate bias generation circuit, 3 is a control circuit, and 4 is an input terminal.The operation thereof will be explained below.

First, the first substrate bias generation circuit 1 operates independently of the operation of the control circuit 3. Second substrate bias generation circuit 2
has a larger capacity than the first substrate bias circuit 1, and is controlled by the control circuit 3 to operate or stop. The operation of the control circuit 3 is determined by a signal applied to the input terminal 4. Here, the main body LSI circuit serves as a dynamic memory, and the signal at input terminal 4 is a row address activation signal (hereinafter referred to as R) that determines the operating state of the dynamic memory.
An example will be described in which the RAS signal is synchronized with the inverted signal (abbreviated as the AS signal). When the input signal <RAS signal) is at a high level, that is, when the dynamic memory is in a standby state, the operation of the second substrate bias generation circuit 2 is stopped. At this time, the first substrate bias generation circuit 1 is in a standby state and has the minimum capability necessary for improving the characteristics. When the input signal (RAS signal) is at a low level, that is, when the dynamic memory is in an operating state, the second substrate bias generation circuit 2 is operated to suppress the substrate potential from becoming shallow.

With the above-described operation, in this conventional dynamic memory, by stopping the second substrate bias generation circuit having a large capacity during standby, it is possible to suppress wasteful current consumption.

The problem that the invention seeks to solve However, in the above configuration, when the power is turned on.

Sometimes, when the signal (RAS signal) applied to the input terminal 4 is at a high level, the second substrate bias generation circuit 2 with large capacity is stopped, and it takes a long time for the substrate potential to reach a certain value. Put it away.

That is, the conventional LSI circuit has a problem in that it takes a long time from turning on the power until the circuit is in a normal operating state.

In view of the above-mentioned problems, the present invention operates a second high-capacity substrate bias generation circuit to quickly maintain a constant substrate potential even if the signal (RAS signal) applied to the input terminal 4 when the power is turned on is at a high level. It is something that makes you.

Means for Solving the Problems In order to solve the above problems, the present invention adds a method to a substrate bias generation circuit and a control circuit for controlling its operation, and controls the operation of the control circuit when the power is turned on. It is equipped with a flip-flop that can be regulated.

Effect of the Invention According to the present invention, the substrate potential can be quickly kept constant by suppressing the operation of the control circuit and operating the high-capacity substrate bias generation circuit from when the power is turned on until a reset signal is applied to change the state of the flip-flop. Can be a value.

Embodiment Hereinafter, an example in which a substrate bias generation circuit according to an embodiment of the present invention is applied to a dynamic memory will be explained with reference to the drawings.

FIG. 1 is a block diagram showing the structure of a substrate bias generation circuit according to an embodiment of the present invention. 1 is a first substrate bias generation circuit, 2 is a second substrate bias generation circuit with a large capacity, 3 is a control circuit, and 4 is an input terminal, which are the same as in the conventional example. 5 is a flip-flop, and 6 is a reset terminal. The operation of this substrate bias generation circuit will be described below.

First, the first substrate bias generation circuit 1 operates independently of the operation of the control circuit 3. Second substrate bias generation circuit 2
The control circuit 3 controls whether to operate or stop. The operation of the control circuit 3 is determined by a signal applied to the input terminal 4. In the case of this embodiment, when the input signal (RAS signal) applied to the input terminal 4 is at high level, that is, when the dynamic memory is in the standby state,
The control circuit 3 operates to stop the operation of the second substrate bias generation circuit 2. At this time, the first substrate bias generation circuit 1 is in a standby state and has the minimum capability necessary for improving the characteristics. When the input signal (RAS signal) to input terminal 4 is low level, that is,
When the dynamic memory is in the active state, the control circuit 3 is not in operation, and the second substrate bias generation circuit 2 is in the active state, thereby suppressing the substrate potential from becoming shallow. The operation up to this point is the same as the conventional example, but since the flip-flop 5 is designed so that the control circuit 3 does not operate in its initial state, it is reset to the reset terminal 6 of the flip-flop 5 when the power is turned on. The second substrate bias generation circuit 2 with greater capacity can operate until the signal is applied. Therefore, according to this embodiment,
Even when the power is turned on, the second substrate bias generation circuit with a large capacity can be operated depending on the initial state of the flip-flop 5, and thereby the substrate potential can be quickly brought to a constant value.

This embodiment uses two substrate bias generation circuits with different capabilities and one flip-flop, and the LSI circuit has two operating states, standby and operating, but generally there are two or more states. It goes without saying that the substrate bias generation circuit of the present invention can be applied to an LSI circuit in which two or more operating states exist to effectively reduce power consumption.

Effects of the Invention As described above, the present invention has two substrate bias generating circuits with different capabilities, and the operation of the substrate bias generating circuit with the larger capability among the two substrate bias generating circuits can be performed on the main body LSI.
It consists of a control circuit that controls the circuit according to the operating state of the circuit, and a flip-flop that suppresses the operation of the control circuit. By suppressing this operation and at the same time operating a high-capacity substrate bias generation circuit, it is possible to quickly (substrate potential) to a constant value when the power is turned on.

[Brief explanation of the drawing]

FIG. 1 is a block diagram showing a substrate bias circuit according to an embodiment of the present invention, and FIG. 2 is a block diagram showing the configuration of a conventional example. 1.2...First and second substrate bias generation circuits, 3...Control circuit, 4...Input terminal,
5...Flip-flop, 6...Reset terminal.

Claims (1)

[Claims] The device is characterized by comprising a substrate bias generation circuit, a control circuit that controls the operation of the substrate bias generation circuit, and a flip-flop that suppresses the operation of the control circuit from when the power is turned on until a reset signal is applied. Integrated circuit device.