JPS6329268U - - Google Patents
Info
- Publication number
- JPS6329268U JPS6329268U JP12389886U JP12389886U JPS6329268U JP S6329268 U JPS6329268 U JP S6329268U JP 12389886 U JP12389886 U JP 12389886U JP 12389886 U JP12389886 U JP 12389886U JP S6329268 U JPS6329268 U JP S6329268U
- Authority
- JP
- Japan
- Prior art keywords
- tape
- circuit
- recording
- output
- data
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 230000003321 amplification Effects 0.000 claims description 5
- 238000003199 nucleic acid amplification method Methods 0.000 claims description 5
- 238000001514 detection method Methods 0.000 claims description 3
- 230000001172 regenerating effect Effects 0.000 claims 2
- 238000010586 diagram Methods 0.000 description 4
- 210000000078 claw Anatomy 0.000 description 1
Landscapes
- Signal Processing For Digital Recording And Reproducing (AREA)
Description
第1図はこの考案の一実施例のブロツク図、第
2図はこの考案の実施例の動作説明図、第3図は
従来のデータレコーダのブロツク図、第4図は従
来の動作説明図である。
図においてAは再生記録制御信号、Bはデータ
保護検出器出力信号、Cは記録禁止信号、Dはテ
ープ走行禁止信号、Eは記録増幅回路出力許可信
号、Fは再生電気信号、Gは検索信号、Hはテー
プ巻戻し信号、T1は検索時間、T2は未記録部
判断時間、T3はテープ巻戻し時間、1はカセツ
トテープ、2はデータ保護設定用ツメ、3は機能
設定回路、4は記録条件比較回路、5はデータ保
護検出器、6はテープ速度制御回路、7はテープ
駆動部、8は入力増幅回路、9は記録増幅回路、
10は記録用ヘツド、11は再生用ヘツド、12
は再生増幅回路、13は出力増幅回路、14は未
記録部検出回路である。なお、図中同一符号は同
一又は相当部分を示す。
Fig. 1 is a block diagram of an embodiment of this invention, Fig. 2 is an explanatory diagram of the operation of an embodiment of this invention, Fig. 3 is a block diagram of a conventional data recorder, and Fig. 4 is an explanatory diagram of the conventional operation. be. In the figure, A is a reproduction recording control signal, B is a data protection detector output signal, C is a recording prohibition signal, D is a tape running prohibition signal, E is a recording amplifier circuit output permission signal, F is a reproduction electric signal, and G is a search signal. , H is a tape rewinding signal, T1 is a search time, T2 is an unrecorded part judgment time, T3 is a tape rewinding time, 1 is a cassette tape, 2 is a data protection setting claw, 3 is a function setting circuit, 4 is a recording condition comparison circuit, 5 is a data protection detector, 6 is a tape speed control circuit, 7 is a tape drive section, 8 is an input amplifier circuit, 9 is a recording amplifier circuit,
10 is a recording head, 11 is a reproduction head, 12
13 is a reproduction amplification circuit, 13 is an output amplification circuit, and 14 is an unrecorded portion detection circuit. Note that the same reference numerals in the figures indicate the same or corresponding parts.
Claims (1)
を設定する機能設定回路と、カセツトテープのデ
ータ保護がされているかどうかを検出する保護検
出器と、前記データ保護検出器の出力と機能設定
回路の設定条件とを入力し、データ保護設定と記
録の設定が同時になされた時に、記録禁止信号及
びテープ走行禁止信号を出力する記録条件比較回
路と、テープ走行速度を前記機能設定回路の設定
値と一致するようにテープ駆動部を制御するテー
プ速度制御回路と、このテープ速度制御回路の出
力に従つてカセツトテープを走行させるテープ駆
動部と、入力データを一定のレベルまで増幅する
入力増幅回路と、前記入力増幅回路の出力を周波
数特性の補整を加え前記機能設定回路からの記録
増幅回路出力許可信号が許可状態の時にだけ増幅
出力する記録増幅回路と、この記録増幅回路の出
力に従つてテープに磁気記録するための記録用ヘ
ツドと、このヘツドによりテープ上に記録された
磁気信号から電気信号に変換する再生ヘツドと、
前記再生ヘツドの電気信号に周波数特性の補整を
加えテープに記録された前記入力増幅回路の入力
データに再現する再生増幅回路と、前記再生増幅
回路出力を所定のレベルまで増幅する出力増幅回
路とを備えたテープレコーダにおいて、前記記録
条件比較回路からのテープ走行禁止信号を受けて
前記再生増幅回路の出力をモニタしデータの後部
にDCレベル、ACレベルが共にゼロである状態
が続くデータ最終部分を検出するとともにその検
出信号により所定の時間テープを巻戻すテープ巻
戻し信号を上記記録条件比較回路を介して上記テ
ープ速度制御回路へ導入させるための未記録部検
出回路を具備したことを特徴とするデータレコー
ダ。 A function setting circuit that sets data playback, recording, tape running speed, etc., a protection detector that detects whether the data on the cassette tape is protected, and the output of the data protection detector and the setting conditions of the function setting circuit. and a recording condition comparison circuit that outputs a recording inhibit signal and a tape running inhibit signal when data protection settings and recording settings are made at the same time, and a recording condition comparison circuit that outputs a tape running speed to match the setting value of the function setting circuit. a tape speed control circuit that controls a tape drive section; a tape drive section that runs a cassette tape according to the output of the tape speed control circuit; an input amplification circuit that amplifies input data to a certain level; and the input amplification circuit. A recording amplifier circuit which corrects the frequency characteristics of the output of the circuit and amplifies and outputs the output only when the recording amplifier circuit output permission signal from the function setting circuit is in the permission state, and magnetically records on the tape according to the output of the recording amplifier circuit. a recording head for recording, a reproduction head for converting magnetic signals recorded on the tape by the head into electrical signals;
a regenerative amplifier circuit that corrects frequency characteristics of the electrical signal of the reproducing head and reproduces the input data of the input amplifier circuit recorded on tape; and an output amplifier circuit that amplifies the output of the regenerative amplifier circuit to a predetermined level. In the tape recorder equipped with the above-mentioned tape recorder, the output of the reproduction amplification circuit is monitored in response to the tape running prohibition signal from the recording condition comparison circuit, and the final portion of the data in which both the DC level and the AC level continue to be zero at the rear of the data is detected. The present invention is characterized by comprising an unrecorded portion detection circuit for detecting and rewinding the tape for a predetermined time based on the detection signal, and for introducing a tape rewind signal to the tape speed control circuit via the recording condition comparison circuit. data recorder.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP12389886U JPS6329268U (en) | 1986-08-12 | 1986-08-12 |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP12389886U JPS6329268U (en) | 1986-08-12 | 1986-08-12 |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPS6329268U true JPS6329268U (en) | 1988-02-26 |
Family
ID=31015425
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP12389886U Pending JPS6329268U (en) | 1986-08-12 | 1986-08-12 |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS6329268U (en) |
-
1986
- 1986-08-12 JP JP12389886U patent/JPS6329268U/ja active Pending
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