JPS63310965A - Sputtering device - Google Patents
Sputtering deviceInfo
- Publication number
- JPS63310965A JPS63310965A JP14603287A JP14603287A JPS63310965A JP S63310965 A JPS63310965 A JP S63310965A JP 14603287 A JP14603287 A JP 14603287A JP 14603287 A JP14603287 A JP 14603287A JP S63310965 A JPS63310965 A JP S63310965A
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- Japan
- Prior art keywords
- substrate
- target
- thin film
- controller
- regulating device
- Prior art date
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- Physical Vapour Deposition (AREA)
- Electrodes Of Semiconductors (AREA)
- Physical Deposition Of Substances That Are Components Of Semiconductor Devices (AREA)
Abstract
Description
【発明の詳細な説明】
(産業上の利用分野)
本発明は、微細な構造を有する基板表面へ薄膜を形成す
るスパッタリング装置に間する。DETAILED DESCRIPTION OF THE INVENTION (Industrial Application Field) The present invention relates to a sputtering apparatus for forming a thin film on the surface of a substrate having a fine structure.
(従来の技術)
半導体等集積回路を製造する工程の中に、基板表面に回
路の配線を形成するための導電性薄膜を堆積させるなど
の薄膜形成の工程がある。(Prior Art) In the process of manufacturing integrated circuits such as semiconductors, there is a process of forming a thin film such as depositing a conductive thin film on the surface of a substrate for forming circuit wiring.
この薄膜の形成にはスパッタリング法が多く用いられて
いるが、回路の集積度が高まるにつれて、縦横比(以下
、アスペクト比とよぶ)の高い、深い溝やコンタクトホ
ール等の深い穴の底部に、配線等のために特定物質を堆
積させて、いわゆる「溝膜」を作るなどの過酷な条件の
成膜の要求が高まっている。Sputtering is often used to form this thin film, but as the degree of integration of circuits increases, sputtering is often used at the bottom of deep holes such as deep grooves and contact holes with high aspect ratios (hereinafter referred to as aspect ratios). There is an increasing demand for film formation under harsh conditions, such as by depositing specific materials to form so-called "groove films" for wiring and the like.
スパッタリング法は、スパッタチャンバーにガスを導入
してこれを放電によってイオン化し、成膜すべき物質で
作られたターゲットをこのイオン化ガスで衝撃して成膜
物質の分子または原子を飛び出させ、これを基板面に付
着堆積させる成膜方法であるが、周知のように、ターゲ
ットより飛び出したスパッタ原子はほぼランバートの余
弦則に説明される角度分布を持っている。 (株式会社
アグネ発行、「真空蒸着」P25 参照。)(発明が
解決しようとする問題点)
第8図は、従来のスパッタリング装置によって、アスペ
クト比1.0のコンタクトホールを持つ基板に溝膜を形
成した場合のコンタクトホール部の断面図を、シミュレ
ーションによって求めたものである。図において1はス
パッタリングによる堆積膜、10はそのうち゛の溝膜、
2は基板である。In the sputtering method, a gas is introduced into a sputtering chamber and ionized by electric discharge, and a target made of the material to be deposited is bombarded with this ionized gas to eject molecules or atoms of the material to be deposited. This is a film forming method in which sputtered atoms are deposited on a substrate surface, and as is well known, sputtered atoms ejected from a target have an angular distribution approximately explained by Lambert's cosine law. (Refer to p. 25 of "Vacuum Deposition" published by Agne Co., Ltd.) (Problems to be solved by the invention) Figure 8 shows how a groove film is formed on a substrate having a contact hole with an aspect ratio of 1.0 using a conventional sputtering device. A cross-sectional view of the contact hole portion when formed is obtained by simulation. In the figure, 1 is a film deposited by sputtering, 10 is a groove film,
2 is a substrate.
上述のようにターゲットより基板へ到達するスパッタ原
子は様々な入射角度を持っている為、ホール段差部の作
る影およびセルフシャドウィング効果
(これに関しては次の文献皿ち、伊藤他rVLSIの薄
膜技術」丸善。および、1.A、Blech etal
。As mentioned above, the sputtered atoms reaching the substrate from the target have various incident angles, so there is a shadow created by the hole step and a self-shadowing effect (this is discussed in the following references: Ito et al., VLSI thin film technology). ” Maruzen. and 1. A, Blech et al.
.
J、Appl、Phys、54(6)1983 、参照
)のためホールの底部へは殆んど膜堆積がなされない。J. Appl., Phys., 54(6) 1983), so almost no film is deposited on the bottom of the hole.
(発明の目的)
本発明はこの問題を解決し、上記のように従来の技術で
は側底不可能とされてきた高アスペクト比のコンタクト
ホールの底面等への膜生成を可能にするスパッタリング
装置の提供を目的とする。(Objective of the Invention) The present invention solves this problem and provides a sputtering device that enables film formation on the bottom surface of a contact hole with a high aspect ratio, which has been considered impossible with the conventional technology. For the purpose of providing.
(問題を解決するための手段)
本発明は、基板上に薄膜を堆積させるスパッタリング装
置において、スパッタターゲットと該基板との間の空間
に、該基板の被処理表面を覆って、該基板表面に向かっ
て飛行するスパッタ粒子の飛行方向を、ほぼ所定の単一
方向に規制する方向規制装置を設けたスパッタリング装
置によって前記目的を達成したものである。(Means for Solving the Problems) The present invention provides a sputtering apparatus for depositing a thin film on a substrate, in which a sputtering target is placed in a space between a sputter target and the substrate to cover the surface to be processed of the substrate. The above object has been achieved by a sputtering apparatus that is provided with a direction regulating device that regulates the direction of flight of sputtered particles flying towards a substantially single predetermined direction.
(作用)
ターゲットから放出されるスパッタ粒子が飛行を制限さ
れて、ほぼ所定の単一方向に飛行する整列されたスパッ
タ粒子だけが基板へ入射することになる。(Operation) Sputtered particles emitted from the target are restricted in flight, and only aligned sputtered particles flying in a substantially predetermined single direction will be incident on the substrate.
(実施例) 以下、図を用いて本発明の実施例を詳細に説明する。(Example) Embodiments of the present invention will be described in detail below with reference to the drawings.
第1図は本発明のスパッタリング装置の実施例の概略の
構成を示す正面断面図であって、3は真空容器、4はカ
ソード、5はターゲット、6は本発明の特徴をなす方向
規制装置、7は基板である。FIG. 1 is a front sectional view showing a schematic configuration of an embodiment of the sputtering apparatus of the present invention, in which 3 is a vacuum vessel, 4 is a cathode, 5 is a target, 6 is a direction regulating device that is a feature of the present invention, 7 is a substrate.
真空容器3ヘアルゴンガス等の希ガスを導入し、カソー
ド4に電圧を印加すると放電によってプラズマが生成さ
れターゲット5がスパッタリングされる。When a rare gas such as hair argon gas is introduced into the vacuum vessel 3 and a voltage is applied to the cathode 4, plasma is generated by discharge and the target 5 is sputtered.
このときにターゲットより放出されるスパッタ粒子は、
前記したように、余弦則に従う様々な放出角度をもって
いるが、本装置ではターゲットと基板の間の空間に、基
板の被処理表面を覆って、第2図に要部を示すような、
両端を開放された多数の円筒の蜂の巣状集合体からなる
方向規制装置6が配置されており、この方向規制装置6
をスパッタ粒子が通り抜ける際に、その円筒の形状即ち
、円筒の長さlと円筒の直径dの比Q、/dによって決
まる一定角度の誤差を許容してほぼ単一方向に飛行方向
成分の揃フたスパッタ粒子61だけが基板表面向かって
飛行できることになる。この実施例では、基板の被処理
表面に設けられたコンタクトホールの壁が殆んど基板表
面に垂直であることを考慮して、上記方向規制装置の円
筒の壁面を基板表面に垂直にしているため、ほぼ垂直な
入射角を持つスパッタ粒子62だけが基板70表面に入
射することになる。The sputtered particles emitted from the target at this time are
As mentioned above, there are various emission angles according to the cosine law, but in this device, a beam is placed in the space between the target and the substrate, covering the surface to be processed of the substrate, and the main part is shown in FIG.
A direction regulating device 6 consisting of a honeycomb-like assembly of a large number of cylinders with both ends open is disposed.
When the sputtered particles pass through, the flight direction component is aligned in almost a single direction by allowing a certain angular error determined by the shape of the cylinder, that is, the ratio Q, /d of the length l of the cylinder and the diameter d of the cylinder. Only the sputtered particles 61 can fly toward the substrate surface. In this embodiment, the wall surface of the cylinder of the direction regulating device is made perpendicular to the substrate surface, considering that the walls of the contact holes provided on the surface to be processed of the substrate are almost perpendicular to the substrate surface. Therefore, only the sputtered particles 62 having a substantially vertical angle of incidence will be incident on the surface of the substrate 70.
従って、コンタクトホール等の溝や穴の段差部による影
、およびセルフシャドウィングの効果は発生しにくく、
高アスペクト比を持つコンタクトホール等の底部へも極
めて効果的に膜堆積が行なわれる。Therefore, shadows and self-shadowing effects caused by grooves and hole steps such as contact holes are less likely to occur.
Films can be deposited extremely effectively even on the bottoms of contact holes and the like with high aspect ratios.
さて、直径10インチのカソードとA!1/1%Siの
ターゲットを用い、基板を400’Cに予備加熱したの
ち200℃に保持して、様々な「アスペクト比」の穴を
もつ基板表面に膜堆積を行なった。方向規制装置として
は、ステンレス製の内径30 m m、 厚さ1mm
、 長さ10.1i5.27mmの円筒55個を第2
図のように蜂の巣状に溶接したものを使用している。Now, a cathode with a diameter of 10 inches and A! Using a 1/1% Si target, the substrate was preheated to 400'C and then held at 200C to deposit films on the surface of the substrate having holes of various "aspect ratios." The direction regulating device is made of stainless steel with an inner diameter of 30 mm and a thickness of 1 mm.
, 55 cylinders with a length of 10.1 x 5.27 mm were placed in the second
As shown in the figure, welded honeycomb shapes are used.
第7図に、その実験結果を示す。縦軸は、「コンタクト
ホールの底部の堆積膜膜厚J/r平坦部の堆積膜膜厚」
、郡ち「ボトムカバレッジ値」を示し、横軸は、 「コ
ンタクトホールの深さ」/「ホール底部の直径」、即ち
「アスペクト比」を示す。黒丸は方向規制装置を持たな
い従来装置による各個をプロットしたもの、白抜きの丸
は上記実施例の装置による膜堆積の各個をプロットして
示したものである。FIG. 7 shows the experimental results. The vertical axis is "deposited film thickness at the bottom of the contact hole J/r deposited film thickness at the flat part"
, the horizontal axis indicates the "bottom coverage value", and the horizontal axis indicates the "depth of the contact hole"/"diameter of the bottom of the hole", that is, the "aspect ratio". The black circles are plots of each film deposited by the conventional apparatus without a direction regulating device, and the open circles are plots of each film deposited by the apparatus of the above embodiment.
従来の方法ではアスペクト比1.0においてはコンタク
トホール底部へは殆んど膜付着が行なわれないが、本発
明の方向規制装置を用いる場合は、ボトムカバレッジ7
0%の秀れた成績を得ている。In the conventional method, when the aspect ratio is 1.0, almost no film is deposited on the bottom of the contact hole, but when using the direction regulating device of the present invention, the bottom coverage is 7.
He has an excellent score of 0%.
本発明の方向規制装置は、前記の円筒の集合体に限らず
種々の形状・構造が可能である。The direction regulating device of the present invention is not limited to the above-mentioned cylindrical assembly, and can have various shapes and structures.
第3図には、両端を開放した角筒を並べて蜂の巣状に集
合した構造のもの、第4図には複数の円筒を同心円状に
配置した構成のもの、第5図には第4図の装置に半径方
向の壁面の複数個を軸状に加味したものを示す。更に第
6図には、単に短冊状の平板を並べただけの構成の方向
規制装置を示す。第4図や第6図の方向規制装置では、
壁面に平行な方向についてのみ方向規制が行なわれるも
のであるが、半導体装置の構成や溝の種類等によっては
、かかる構成のものでも十分に、もしくは、他では得ら
れない特殊な効果を挙げることが出来るものである。Fig. 3 shows a structure in which rectangular cylinders with both ends open are lined up and assembled in a honeycomb shape, Fig. 4 shows a structure in which multiple cylinders are arranged concentrically, and Fig. 5 shows a structure in which a plurality of cylinders are arranged concentrically. The device is shown in which a plurality of radial wall surfaces are added in an axial manner. Furthermore, FIG. 6 shows a direction regulating device that is simply constructed by arranging rectangular flat plates. In the direction regulating device shown in Figures 4 and 6,
Directional regulation is performed only in the direction parallel to the wall surface, but depending on the configuration of the semiconductor device, the type of groove, etc., a device with such a configuration may be sufficient or may produce special effects that cannot be obtained with other methods. This is something that can be done.
なお上記は方向規制が基板表面に垂直な方向に行なわれ
るものばかりであるが、半導体装置の構造によっては、
方向規制を故意に斜め方向にして効果を挙げることがあ
る。Note that in all of the above cases, direction regulation is performed in a direction perpendicular to the substrate surface, but depending on the structure of the semiconductor device,
It is sometimes effective to intentionally set the direction regulation diagonally.
本発明は方向規制装置の設置に特徴があるが、方向規制
装置には上記以外の副次的効果が存在する。例えば、方
向規制装置を導電体で作りこれを第1図のようにアース
電位に保っときは、主放電プラズマをカソード4と方向
規制装置の間に閉じ込め、プラズマによる基板のダメー
ジを大いに抑制することが出来る。Although the present invention is characterized by the installation of a direction regulating device, the direction regulating device has secondary effects other than those described above. For example, when the direction regulating device is made of a conductor and kept at ground potential as shown in Fig. 1, the main discharge plasma is confined between the cathode 4 and the direction regulating device, and damage to the substrate caused by the plasma can be greatly suppressed. I can do it.
更に、この方向規制装置をアースに接続する連絡部10
に放電観測用の計測器を接続することにより、成膜中の
プラズマを観察して必要なデータをとることが可能とな
る。Furthermore, a communication section 10 connects this direction regulating device to ground.
By connecting a discharge observation measuring instrument to the plasma, it becomes possible to observe the plasma during film formation and obtain the necessary data.
主放電が基板表面から隔離されるので、基板を搬送して
も、基板の運動によって放電の安定性を損なうことが無
いという長所もある。Since the main discharge is isolated from the substrate surface, there is also the advantage that, even when the substrate is transported, the stability of the discharge is not impaired by movement of the substrate.
また、この方向規制装置にバイアス電圧を印加すること
によって、イオン化しているスパッタ粒子が基板表面に
衝突するときのエネルギーの大きさを適値に調整するこ
とが可能であり、更にまた、方向規制装置と基板の間に
バイアス電圧を印加することによフては、基板上面の電
界を一様なものとし同時に基板のバイアス効果を高める
ことが出来る。In addition, by applying a bias voltage to this direction regulating device, it is possible to adjust the energy level of the ionized sputtered particles when they collide with the substrate surface to an appropriate value, and furthermore, the direction regulating device can be applied. By applying a bias voltage between the device and the substrate, the electric field on the upper surface of the substrate can be made uniform and at the same time, the biasing effect of the substrate can be enhanced.
本発明の装置は前記したように、配線用導電体溝膜の堆
積で特に顕著な効果を現すが、絶縁性または半導体膜の
形成にも実用上大きい効果の期待できるものである。As described above, the apparatus of the present invention is particularly effective in depositing conductor groove films for wiring, but it can also be expected to have great practical effects in forming insulating or semiconductor films.
(発明の効果)
以上のように本発明は、半導体等の集積回路の配線形成
のための薄膜生成等において、特に高アスペクト比のコ
ンタクトホール等への溝膜生成において、簡単な構造に
より薄膜堆積を容易にする効果がある。(Effects of the Invention) As described above, the present invention enables thin film deposition with a simple structure in the production of thin films for wiring formation of integrated circuits such as semiconductors, especially in the production of groove films for contact holes with high aspect ratios. It has the effect of making it easier.
第1図は、本発明の実施例の概略の正面断面図。
第2図は、その一部の方向規制装置の斜視図。
第3. 4.5. 6図は、本発明の別の実施例の方向
規制装置斜視図。
第7図は、従来および本発明の装置のボトムカバレッジ
値対アスペクト比のグラフ。
第8図は、従来のスパッタ法によりアスペクト比1.0
のコンタクトホールへ薄膜を形成したときのシミュレー
ションの断面図。
1・・・・・・薄膜、2・・・・・・基板、3・・・・
・・真空容器、4・・・・・・カソード、5・・・・・
・ターゲット、6・・・・・・蜂の巣状方向規制装置、
7・・・・・・基板。
特許出願人 日電アネルバ株式会社
代理人 弁理士 村上 健次
、f先車A +zk)テ゛づFIG. 1 is a schematic front sectional view of an embodiment of the present invention. FIG. 2 is a perspective view of a part of the direction regulating device. Third. 4.5. FIG. 6 is a perspective view of a direction regulating device according to another embodiment of the present invention. FIG. 7 is a graph of bottom coverage values versus aspect ratios for conventional and inventive devices. Figure 8 shows the aspect ratio of 1.0 obtained by conventional sputtering method.
A cross-sectional view of a simulation when a thin film is formed in a contact hole. 1...Thin film, 2...Substrate, 3...
...Vacuum container, 4...Cathode, 5...
・Target, 6...honeycomb direction regulating device,
7... Board. Patent applicant Kenji Murakami, agent of Nichiden Anelva Co., Ltd., patent attorney
Claims (4)
おいて、スパッタターゲットと該基板との間の空間に、
該基板の被処理表面を覆って、該基板表面に向かって飛
行するスパッタ粒子の飛行方向を、ほぼ所定の単一方向
に規制する方向規制装置を設けたことを特徴とするスパ
ッタリング装置。(1) In a sputtering device that deposits a thin film on a substrate, in the space between the sputter target and the substrate,
A sputtering apparatus comprising a direction regulating device that covers a surface of the substrate to be processed and regulates the direction of flight of sputtered particles flying toward the surface of the substrate to substantially a single predetermined direction.
第1項記載のスパッタリング装置。(2) The sputtering apparatus according to item 1, wherein the thin film to be deposited is a conductor.
面を持つ筒の蜂の巣状集合体であることを特徴とする第
1項記載のスパッタリング装置。(3) The sputtering apparatus according to item 1, wherein the direction regulating device is a honeycomb-like collection of cylinders having walls parallel to the single predetermined direction.
行であることを特徴とする第1項記載のスパッタリング
装置。(4) The sputtering apparatus according to item 1, wherein the single direction is parallel to the side wall surface of the groove or hole on the substrate surface.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP62146032A JPH0660391B2 (en) | 1987-06-11 | 1987-06-11 | Sputtering equipment |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP62146032A JPH0660391B2 (en) | 1987-06-11 | 1987-06-11 | Sputtering equipment |
Related Child Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP2328096A Division JP2781165B2 (en) | 1996-01-16 | 1996-01-16 | Sputtering equipment |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPS63310965A true JPS63310965A (en) | 1988-12-19 |
| JPH0660391B2 JPH0660391B2 (en) | 1994-08-10 |
Family
ID=15398565
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP62146032A Expired - Lifetime JPH0660391B2 (en) | 1987-06-11 | 1987-06-11 | Sputtering equipment |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPH0660391B2 (en) |
Cited By (21)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPH02115365A (en) * | 1988-10-25 | 1990-04-27 | Mitsubishi Electric Corp | Sputtering device |
| US5171412A (en) * | 1991-08-23 | 1992-12-15 | Applied Materials, Inc. | Material deposition method for integrated circuit manufacturing |
| US5223108A (en) * | 1991-12-30 | 1993-06-29 | Materials Research Corporation | Extended lifetime collimator |
| US5330628A (en) * | 1990-01-29 | 1994-07-19 | Varian Associates, Inc. | Collimated deposition apparatus and method |
| US5346601A (en) * | 1993-05-11 | 1994-09-13 | Andrew Barada | Sputter coating collimator with integral reactive gas distribution |
| US5371042A (en) * | 1992-06-16 | 1994-12-06 | Applied Materials, Inc. | Method of filling contacts in semiconductor devices |
| US5393398A (en) * | 1991-06-19 | 1995-02-28 | Sony Corporation | Magnetron sputtering apparatus |
| US5401675A (en) * | 1991-04-19 | 1995-03-28 | Lee; Pei-Ing P. | Method of depositing conductors in high aspect ratio apertures using a collimator |
| US5403779A (en) * | 1992-02-26 | 1995-04-04 | International Business Machines Corporation | Refractory metal capped low resistivity metal conductor lines and vias formed using PVD and CVD |
| US5415753A (en) * | 1993-07-22 | 1995-05-16 | Materials Research Corporation | Stationary aperture plate for reactive sputter deposition |
| JPH07166345A (en) * | 1993-12-15 | 1995-06-27 | Nec Corp | Sputtering device |
| US5505833A (en) * | 1993-07-26 | 1996-04-09 | Siemens Aktiengesellschaft Ag | Method for depositing a layer on a substrate wafer with a sputtering process |
| US5529670A (en) * | 1991-04-19 | 1996-06-25 | International Business Machines Corporation | Method of depositing conductors in high aspect ratio apertures under high temperature conditions |
| US5536381A (en) * | 1994-06-29 | 1996-07-16 | Samsung Electronics Co., Ltd. | Sputtering device |
| US5635036A (en) * | 1990-01-26 | 1997-06-03 | Varian Associates, Inc. | Collimated deposition apparatus and method |
| US5711858A (en) * | 1994-04-12 | 1998-01-27 | International Business Machines Corporation | Process for depositing a conductive thin film upon an integrated circuit substrate |
| US5804046A (en) * | 1993-07-06 | 1998-09-08 | Japan Energy Corporation | Thin-film forming apparatus |
| US6521106B1 (en) * | 1990-01-29 | 2003-02-18 | Novellus Systems, Inc. | Collimated deposition apparatus |
| US6922325B2 (en) | 2000-07-06 | 2005-07-26 | Anelva Corporation | Electrostatic attraction mechanism, surface processing method and surface processing device |
| JP2006024767A (en) * | 2004-07-08 | 2006-01-26 | Koa Corp | Manufacturing method of chip resistor |
| JP2010222640A (en) * | 2009-03-24 | 2010-10-07 | Toppan Printing Co Ltd | Method for producing gas barrier film |
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| JPS50133984A (en) * | 1974-04-10 | 1975-10-23 | ||
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| JPS57161064A (en) * | 1981-03-31 | 1982-10-04 | Fujitsu Ltd | Sputtering device |
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| JPS6217173A (en) * | 1985-07-15 | 1987-01-26 | Ulvac Corp | Flat plate magnetron sputtering device |
| JPS6299461A (en) * | 1985-10-25 | 1987-05-08 | Hitachi Ltd | Thin film forming apparatus and thin film forming method |
| JPS6379968A (en) * | 1986-09-24 | 1988-04-09 | Fuji Electric Co Ltd | Production of magnetic recording medium |
| JPS63255368A (en) * | 1987-04-13 | 1988-10-21 | Hitachi Ltd | Film forming equipment |
| JPS63307256A (en) * | 1987-06-04 | 1988-12-14 | Seiko Epson Corp | Method for manufacturing alloy thin film |
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| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS50133984A (en) * | 1974-04-10 | 1975-10-23 | ||
| JPS50139470A (en) * | 1974-04-24 | 1975-11-07 | ||
| JPS57161064A (en) * | 1981-03-31 | 1982-10-04 | Fujitsu Ltd | Sputtering device |
| JPS601397A (en) * | 1983-06-17 | 1985-01-07 | Toyoda Autom Loom Works Ltd | Compressor of variable compression capacity type |
| JPS61117273A (en) * | 1984-11-14 | 1986-06-04 | Hitachi Ltd | Planar magnetron method for depositing a film on a substrate with micropores and its apparatus |
| JPS6217173A (en) * | 1985-07-15 | 1987-01-26 | Ulvac Corp | Flat plate magnetron sputtering device |
| JPS6299461A (en) * | 1985-10-25 | 1987-05-08 | Hitachi Ltd | Thin film forming apparatus and thin film forming method |
| JPS6379968A (en) * | 1986-09-24 | 1988-04-09 | Fuji Electric Co Ltd | Production of magnetic recording medium |
| JPS63255368A (en) * | 1987-04-13 | 1988-10-21 | Hitachi Ltd | Film forming equipment |
| JPS63307256A (en) * | 1987-06-04 | 1988-12-14 | Seiko Epson Corp | Method for manufacturing alloy thin film |
Cited By (22)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPH02115365A (en) * | 1988-10-25 | 1990-04-27 | Mitsubishi Electric Corp | Sputtering device |
| US5635036A (en) * | 1990-01-26 | 1997-06-03 | Varian Associates, Inc. | Collimated deposition apparatus and method |
| US5330628A (en) * | 1990-01-29 | 1994-07-19 | Varian Associates, Inc. | Collimated deposition apparatus and method |
| US6521106B1 (en) * | 1990-01-29 | 2003-02-18 | Novellus Systems, Inc. | Collimated deposition apparatus |
| US5529670A (en) * | 1991-04-19 | 1996-06-25 | International Business Machines Corporation | Method of depositing conductors in high aspect ratio apertures under high temperature conditions |
| US5401675A (en) * | 1991-04-19 | 1995-03-28 | Lee; Pei-Ing P. | Method of depositing conductors in high aspect ratio apertures using a collimator |
| US5393398A (en) * | 1991-06-19 | 1995-02-28 | Sony Corporation | Magnetron sputtering apparatus |
| US5171412A (en) * | 1991-08-23 | 1992-12-15 | Applied Materials, Inc. | Material deposition method for integrated circuit manufacturing |
| JPH05239637A (en) * | 1991-08-23 | 1993-09-17 | Applied Materials Inc | Improved material vapor deposition method for production of integrated circuit |
| US5223108A (en) * | 1991-12-30 | 1993-06-29 | Materials Research Corporation | Extended lifetime collimator |
| US5403779A (en) * | 1992-02-26 | 1995-04-04 | International Business Machines Corporation | Refractory metal capped low resistivity metal conductor lines and vias formed using PVD and CVD |
| US5371042A (en) * | 1992-06-16 | 1994-12-06 | Applied Materials, Inc. | Method of filling contacts in semiconductor devices |
| US5346601A (en) * | 1993-05-11 | 1994-09-13 | Andrew Barada | Sputter coating collimator with integral reactive gas distribution |
| US5804046A (en) * | 1993-07-06 | 1998-09-08 | Japan Energy Corporation | Thin-film forming apparatus |
| US5415753A (en) * | 1993-07-22 | 1995-05-16 | Materials Research Corporation | Stationary aperture plate for reactive sputter deposition |
| US5505833A (en) * | 1993-07-26 | 1996-04-09 | Siemens Aktiengesellschaft Ag | Method for depositing a layer on a substrate wafer with a sputtering process |
| JPH07166345A (en) * | 1993-12-15 | 1995-06-27 | Nec Corp | Sputtering device |
| US5711858A (en) * | 1994-04-12 | 1998-01-27 | International Business Machines Corporation | Process for depositing a conductive thin film upon an integrated circuit substrate |
| US5536381A (en) * | 1994-06-29 | 1996-07-16 | Samsung Electronics Co., Ltd. | Sputtering device |
| US6922325B2 (en) | 2000-07-06 | 2005-07-26 | Anelva Corporation | Electrostatic attraction mechanism, surface processing method and surface processing device |
| JP2006024767A (en) * | 2004-07-08 | 2006-01-26 | Koa Corp | Manufacturing method of chip resistor |
| JP2010222640A (en) * | 2009-03-24 | 2010-10-07 | Toppan Printing Co Ltd | Method for producing gas barrier film |
Also Published As
| Publication number | Publication date |
|---|---|
| JPH0660391B2 (en) | 1994-08-10 |
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