JPS6331436U - - Google Patents
Info
- Publication number
- JPS6331436U JPS6331436U JP12567686U JP12567686U JPS6331436U JP S6331436 U JPS6331436 U JP S6331436U JP 12567686 U JP12567686 U JP 12567686U JP 12567686 U JP12567686 U JP 12567686U JP S6331436 U JPS6331436 U JP S6331436U
- Authority
- JP
- Japan
- Prior art keywords
- input
- processing device
- input signal
- signal
- power supply
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 238000001514 detection method Methods 0.000 claims description 7
- 238000010586 diagram Methods 0.000 description 9
- 238000007796 conventional method Methods 0.000 description 1
Landscapes
- Input From Keyboards Or The Like (AREA)
- Control By Computers (AREA)
Description
第１図ないし第７図は本考案第１実施例の図面
で、第１図は第１実施例の概略的構成図、第２図
は電源切替スイツチ回路の構成図、第３図Ａ，Ｂ
，Ｃは第１実施例の動作説明用のタイムチヤート
、第４図は信号検出回路の回路図、第５図は信号
検出回路の動作説明用のタイムチヤート、第６図
は信号検出回路の回路図、第７図は信号検出回路
の動作説明用のタイムチヤート、第８図は本考案
の第２実施例の構成図、第９図は第２実施例の動
作説明用のタイムチヤート、第１０図ないし第１
４図は従来方式に係るもので、第１０図、第１１
図はデイジタル入力装置の構成ブロツク図、第１
２図は入力信号インタフエース内の単位入力回路
図、第１３図は入力処理装置のブロツク図、第１
４図は第１１図に示したデイジタル入力装置の動
作説明用タイムチヤートである。
１……デイジタル入力装置、２……入力処理装
置、３……入力用電源装置、４ａ，４ｂ…４ｎ…
…入力信号インタフエース、７ａ，７ｂ…７ｎ…
…外部接点、５ａ……電源切換スイツチ部、３０
ａ……信号検出回路、１３……フオトダイオード
、５１ａ……スイツチング回路、５２ａ……モノ
マルチ。
1 to 7 are drawings of a first embodiment of the present invention, in which FIG. 1 is a schematic diagram of the first embodiment, FIG. 2 is a diagram of a power supply selector switch circuit, and FIGS. 3A and B
, C is a time chart for explaining the operation of the first embodiment, FIG. 4 is a circuit diagram of the signal detection circuit, FIG. 5 is a time chart for explaining the operation of the signal detection circuit, and FIG. 6 is a circuit diagram of the signal detection circuit. 7 is a time chart for explaining the operation of the signal detection circuit, FIG. 8 is a configuration diagram of the second embodiment of the present invention, FIG. 9 is a time chart for explaining the operation of the second embodiment, and FIG. Figure or first
Figure 4 relates to the conventional method, and Figures 10 and 11
The figure is a block diagram of the configuration of the digital input device.
Figure 2 is a unit input circuit diagram in the input signal interface, Figure 13 is a block diagram of the input processing device, and Figure 1 is a block diagram of the input processing device.
FIG. 4 is a time chart for explaining the operation of the digital input device shown in FIG. 11. 1...Digital input device, 2...Input processing device, 3...Input power supply device, 4a, 4b...4n...
...Input signal interface, 7a, 7b...7n...
...External contact, 5a...Power selector switch section, 30
a... Signal detection circuit, 13... Photo diode, 51a... Switching circuit, 52a... Mono multi.
Claims (1)
グループ毎に対応した入力信号インタフエースを
介して入力処理装置に入力させるものにおいて、
前記各接点に電源を供給する入力用電源装置と、
前記接点からのデータを入力処理装置に出力する
入力信号検出回路と、この入力信号検出回路に接
続される入力用電源装置の帰線に介挿され、入力
処理装置からの信号によりスイツチングする電源
切替スイツチ部とを備えた入力信号インタフエー
スを複数個設け、各入力信号インタフエースをト
リガ信号線で縦続接続して、第１位の入力信号イ
ンタフエースが前記入力処理装置からの信号によ
り最初に動作し、以後の動作はトリガ信号線を介
して順次伝送されて行くようにしたことを特徴と
するデイジタル入力装置。 In a device that divides a plurality of contacts into groups and inputs each data to an input processing device via an input signal interface corresponding to each group,
an input power supply device that supplies power to each of the contacts;
an input signal detection circuit that outputs data from the contact to the input processing device; and a power supply switch that is inserted in the return line of the input power supply device connected to the input signal detection circuit and that switches according to a signal from the input processing device. A plurality of input signal interfaces each having a switch section are provided, and each input signal interface is cascade-connected by a trigger signal line, and the first input signal interface is activated first by the signal from the input processing device. A digital input device characterized in that subsequent operations are sequentially transmitted via a trigger signal line.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP12567686U JPS6331436U (en) | 1986-08-18 | 1986-08-18 |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP12567686U JPS6331436U (en) | 1986-08-18 | 1986-08-18 |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPS6331436U true JPS6331436U (en) | 1988-03-01 |
Family
ID=31018779
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP12567686U Pending JPS6331436U (en) | 1986-08-18 | 1986-08-18 |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS6331436U (en) |
-
1986
- 1986-08-18 JP JP12567686U patent/JPS6331436U/ja active Pending
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