JPS6333629U - - Google Patents

Info

Publication number
JPS6333629U
JPS6333629U JP12750586U JP12750586U JPS6333629U JP S6333629 U JPS6333629 U JP S6333629U JP 12750586 U JP12750586 U JP 12750586U JP 12750586 U JP12750586 U JP 12750586U JP S6333629 U JPS6333629 U JP S6333629U
Authority
JP
Japan
Prior art keywords
contact hole
film
width
insulating film
conductive
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP12750586U
Other languages
Japanese (ja)
Other versions
JPH0322916Y2 (en
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed filed Critical
Priority to JP12750586U priority Critical patent/JPH0322916Y2/ja
Publication of JPS6333629U publication Critical patent/JPS6333629U/ja
Application granted granted Critical
Publication of JPH0322916Y2 publication Critical patent/JPH0322916Y2/ja
Expired legal-status Critical Current

Links

Landscapes

  • Testing Of Individual Semiconductor Devices (AREA)
  • Testing Or Measuring Of Semiconductors Or The Like (AREA)
  • Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)

Description

【図面の簡単な説明】[Brief explanation of drawings]

第1図は本考案に係る半導体装置の導電パター
ンの略示平面図であり、第2図は第1図に示す導
電パターンのコンタクト孔部分の拡大平面図であ
る。また第3図はコンタクト孔形成部位の拡大縦
断面図である。 1……半導体ウエーハ〔基板〕、2a,2b…
…酸化膜、3a,3b……絶縁膜、4……導電膜
、5……ゲートポリSi、6a,6b……コンタ
クト孔、L,L……コンタクト孔の幅寸法、
……導電パターンの幅寸法。
FIG. 1 is a schematic plan view of a conductive pattern of a semiconductor device according to the present invention, and FIG. 2 is an enlarged plan view of a contact hole portion of the conductive pattern shown in FIG. Further, FIG. 3 is an enlarged longitudinal cross-sectional view of a contact hole forming region. 1... Semiconductor wafer [substrate], 2a, 2b...
... Oxide film, 3a, 3b ... Insulating film, 4 ... Conductive film, 5 ... Gate poly-Si, 6a, 6b ... Contact hole, L 1 , L 2 ... Width dimension of contact hole,
L0 ... Width dimension of the conductive pattern.

Claims (1)

【実用新案登録請求の範囲】 半導体ウエーハの上面に酸化膜を介して絶縁膜
と導電膜とを順次積層したものに於いて、 前記絶縁膜にコンタクト孔を形成し、該コンタ
クト孔上に被着される導電パターンの幅寸法を、
前記コンタクト孔の幅寸法と同等以下に設定した
ことを特徴とする半導体装置。
[Claims for Utility Model Registration] In a semiconductor wafer in which an insulating film and a conductive film are sequentially laminated with an oxide film interposed therebetween, a contact hole is formed in the insulating film, and a film is deposited over the contact hole. The width dimension of the conductive pattern to be
A semiconductor device characterized in that the width of the contact hole is set to be equal to or smaller than the width of the contact hole.
JP12750586U 1986-08-20 1986-08-20 Expired JPH0322916Y2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP12750586U JPH0322916Y2 (en) 1986-08-20 1986-08-20

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP12750586U JPH0322916Y2 (en) 1986-08-20 1986-08-20

Publications (2)

Publication Number Publication Date
JPS6333629U true JPS6333629U (en) 1988-03-04
JPH0322916Y2 JPH0322916Y2 (en) 1991-05-20

Family

ID=31022321

Family Applications (1)

Application Number Title Priority Date Filing Date
JP12750586U Expired JPH0322916Y2 (en) 1986-08-20 1986-08-20

Country Status (1)

Country Link
JP (1) JPH0322916Y2 (en)

Also Published As

Publication number Publication date
JPH0322916Y2 (en) 1991-05-20

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