JPS6335083A - Superimposing system - Google Patents

Abstract

PURPOSE:To display information of a sub-image without deletion by providing main scanning lines that displays a main image, and subscanning lines that make partial high speed scanning between main scanning lines. CONSTITUTION:A window 9 is set on a cathode ray tube 8 by the window setting section 6 of a superimposing circuit 4. Sub-image signals are read in a scan converting section 7 by a variable oscillator 5 at frequency n-times reference frequency, and at the same time, deflection current is increased during sub-scanning by the deflection current sub-scanning circuit 3 of a television receiving circuit 1, and sub-scanning is made at a speed n-times main scanning line speed by a horizontal deflecting. Thereby, sub-scanning lines that make partial high speed scanning can be provided between main scanning lines that display a main image on the cathode ray tube 8, and information of a sub-image can be displayed in the window 9 of the cathode ray tube 8.

Description

[Detailed Description of the Invention] Overview When displaying the main picture and sub-pictures on a cathode ray tube in a television receiver, the sub-pictures are displayed in a reduced size, but the display capability in the vertical direction is limited to the number of scanning lines, and the information of the sub-pictures is In order to solve the problem that a part of the image is deleted and the display resolution is lowered by 1 degree Celsius and the image becomes unnatural, the present invention provides a sub-scanning line that partially scans at high speed between the main scanning line that displays the main image and the main scanning line. This is a superimpose method that allows the display of sub-video information without deleting it by providing scanning lines.

Industrial Application Field The present invention is a superimpose method for television receivers. The superimpose method is a method in which two different images are superimposed and displayed on both sides at the same time.
Television receivers with superimpose circuits are becoming commercially available that allow you to simultaneously view broadcast programs on one channel while watching broadcast programs on another channel in one corner of the television screen. Furthermore, the superimpose method is also used to simultaneously display a computer image partially enlarged on a CRT-TV and an auxiliary screen for grasping the entire image.

BACKGROUND OF THE INVENTION Referring to FIG. 6, a block circuit diagram of a conventional television (TV) receiver having a superimposition circuit is shown. 10 is a video switch, main video signal terminal 1
1 and a superimpose terminal 12, and these terminals can be mutually switched. The main video signal input from the main video signal terminal 11 of the video switch 10 is amplified by a video intensifier 14 and then input to a cathode ray tube (CRT). Further, a vertical synchronization signal and a horizontal synchronization signal are separated from the main video signal by a synchronization separation circuit 18, and these synchronization signals are input to a vertical deflection circuit 20 and a horizontal deflection circuit 22, respectively. The vertical deflection circuit 20 and the horizontal deflection circuit 22 each correspond to a vertical deflection coil 24 of the cathode ray tube 16.
and the horizontal deflection coil 26.

28 is a window setting circuit, and a signal from the window setting circuit 28 is input to the video switch 10 to switch this switch to the superimpose terminal 12 side. Window setting circuit 28 is further connected to scan conversion circuit 30. Scan conversion circuit 30 includes a Δ/D converter 32, a memory 34, a compression circuit 36, and a D/A converter 37.

While the sub-picture signal is input to the scan conversion circuit 30,
The synchronization signal separated by the synchronization separation circuit 38 is also input to the scan conversion circuit 30. 40 is a numbering clock, which has a frequency f that is more than twice the frequency of the sub-picture signal. Δ/D conversion is performed on the sub-picture signal. The A/D converted information is temporarily stored in the memory 34. Window setting circuit 2
8 is connected to a compression circuit 36, which compresses the information stored in the memory 34 to 1/n. This compressed information is subjected to D/Δ conversion by a D/A converter 37.

Further, the synchronization signal separated by the synchronization separation circuit 18 is input to the scan conversion circuit 32 . On the other hand, the same II! ] The horizontal synchronizing signal synchronously separated by the separation circuit 18 is input to a PLL circuit 42 and passed through a voltage controlled oscillator (VCO) 44 to a frequency f at the time of sampling by a numbering clock 40. The information stored in the memory 34 is read out by the D/A converter 37 at the same frequency as the main video signal and in synchronization with the main video signal. In this case, if the information is compressed to 1/2 by the compression circuit 36, the signal read out after D/A conversion is also compressed to 1/2, and the signal input to the superimpose terminal 12 of the video switch 10 is Amplified by a video intensifier 14, the cathode ray tube 1
The image is displayed in a 6-window at 1/2 the size vertically and horizontally.

This is schematically shown in Figure 7 as an image screen on a cathode ray tube.If the main image screen is AB and the sub image screen is GE, the superimposed screen is shown in Figure 7 (C).
), and the superimposed sub-image screen CE has each scan line thinned out and one dot.
Since the pixels are thinned out every third time, the display resolution will be reduced.

Problems to be Solved by the Invention In the superimpose method as described above, the O1 image is displayed superimposed on a part of the main image scanning line, so the window size can be changed vertically and horizontally. If the size of the co-main video screen is 1/n, the number of scanning lines that can be used to display the sub-video will be reduced to 1/n, making it difficult to decipher the content displayed on both sides of the superimposed sub-video. was there.

The present invention has been made in view of these points, and its purpose is to provide a TV screen superimposition that allows a sub-picture screen to be superimposed on the main video screen without reducing the display resolution. The aim is to provide a banh bose method.

Means for Solving the Problems FIG. 1 shows a principle block diagram of the present invention, in which a deflection current sub-scanning circuit 3 is provided in the horizontal deflection section 2 of the television receiver circuit 1. A variable oscillator 5 that generates a frequency n times the reference frequency is provided in the pause circuit 4, and a window setting section 6 is connected to the deflection current sub-scanning circuit 3 and the variable oscillator 5. Furthermore, the variable oscillator 5 and the window setting section 6 are connected to each other. is connected to the scan converter 7 of the superimpose circuit 4, reads out the 671 video signal at a frequency n times the reference frequency, and sends this sub-video signal to the window 9 of the cathode ray tube 8.
to be displayed.

Operation: When the window setting unit 6 of the superimposition circuit 4 sets the window 9 on the cathode ray tube 8, the variable oscillator 5 causes the scan conversion unit 7 to read out the sub-picture signal at a frequency n times the reference frequency. At the same time, the deflection current sub-scanning circuit 3 of the television receiver circuit 1 increases the deflection current during the D1 scan, and the horizontal deflection section 2 performs sub-scanning at a speed n times the main scanning line speed. As a result, it is possible to provide six partial high-speed scanning lines between the main scanning lines for displaying the main image on the cathode ray tube 8, and to display the main image on the cathode ray tube 8 without deleting the information of the sub-image. It can be displayed in window 9 of.

Embodiments The present invention will be explained in detail below based on embodiments shown in the drawings.

FIG. 2 is a block circuit diagram of an embodiment of the present invention, and the same components as in the block circuit diagram of the conventional example shown in FIG. Ru. In Figure 2, the video signal is transmitted to video switch 1.
The signal is input to the video intensifier 14 through the main video terminal 11 of 0 and amplified, and the output of the video intensifier 14 is input to the brush tube 16. On the other hand, a vertical synchronization signal and a horizontal synchronization signal are separated from the main video signal by a synchronization separation circuit 18 and inputted to a vertical deflection circuit 20 and a horizontal deflection circuit 22 . The horizontal deflection circuit 22 includes a ramp wave generator 346.
is provided, and when the window is set by the window setting circuit 28 in a time-sharing manner, the window signal is input to the video switch 10 and the video switch is switched to the superimpose terminal 12, and the window signal is input to the horizontal deflection circuit 22 and the lamp. It is also input to the wave generator 46 to drive them. The vertical deflection circuit 20 and the horizontal deflection circuit 22 are connected to the vertical deflection coil 24 and the horizontal deflection coil 26 of the cathode ray tube 16, respectively.

The window signal of the window setting circuit 28 is also input to the scan conversion circuit 30'.The scan conversion circuit 30'
A/D converter 32, memory 34 and D/A converter 37
However, it does not have the conventional compression circuit shown in FIG. The sub-picture signal is input to the scan converter 30', and a synchronization signal is separated by the synchronization separation circuit 38, and this synchronization signal is also input to the scan converter 30'. 4O is a numbering clock, which samples the I video signal and converts the analog signal into a digital signal with the A/D converter 32, A memory 34 stores this digital signal.

On the other hand, the horizontal synchronization signal of the main video signal separated by the synchronization separation circuit 18 is input to the variable oscillator 48, and the window signal of the window setting circuit 2B is also input to the variable oscillator 48. It is composed of a PLL 42 and a voltage regulator (1 oscillator (VC○) 44, and from the VCO 44) outputs a frequency r) times the frequency r of the numbering clock 40, and at this frequency the D/A converter At 37, some of the information stored in the memory 34 is read out. The analog output of the scan conversion circuit 30' is input to the video amplifier 14 while the video switch 10 is switched to the superimpose terminal 12, and the amplified signal is input to the cathode ray tube 16.

On the other hand, when the window setting circuit 28 is set to J:S.quindo, the ramp wave generator 46 generates n ramp waves during the r find period, and the horizontal deflection circuit 22 increases the horizontal scanning frequency by n times. Horizontal deflection coil 26
to the deflection current i. is washed away.

As described above, according to this embodiment, the horizontal deflection coil 2 is controlled by the ramp wave generator 46 so that the horizontal scanning frequency is multiplied by n.
6 is driven, and the sub-picture signal is read out at a frequency n times the reference frequency by the variable oscillator 48. Therefore, partial high-speed scanning is performed between the main scanning lines that display the main picture. Therefore, the sub-scanning line can be inserted, and the sub-image information can be displayed in the window section of the cathode ray tube 16 without deleting the information.

FIG. 3 is a time chart of the embodiment described above,
The window is opened at time T1 and closed at time T2. When the window is opened, a sawtooth ramp wave as shown is generated by the ramp wave generator 46, and this sawtooth horizontal deflection current of 1° is applied to the horizontal deflection coil 2.
6 and performs sub-scanning at twice the speed of main scanning. The video output is an output in which the sub-video output in the window is superimposed on the main video signal.

FIG. 4 is a schematic diagram showing a scanning line on a cathode ray tube, and the deflection current i in FIG. The numbers attached correspond to the scanning line positions in FIG. As is clear from Figure 4, when the screen in the window is reduced to 1/2 of the main screen both vertically and horizontally, there is a portion between the main scanning lines that display the main image. Two sub-scanning lines that scan at high speed are inserted.

Referring now to FIG. 5, this figure has been described above.

The image screen on the cathode ray tube of the example shown in J3 is shown below.
If the sub-picture screen of (B) is superimposed on the main picture screen as shown in Δ), an awkward superimposed screen as shown in (C) will be obtained, which will reduce the display resolution of the sub-pictures. It is possible to superimpose a sub-picture screen on the main picture screen without having to do so.

Effects of the Invention As described in detail above, the present invention is configured to provide a sub-scanning line that scans the window portion at high speed between the main scanning lines that display the main image, so that it is possible to display the sub-image. The effect is that the sub-picture screen can be superimposed on the main video screen without reducing the resolution.

[Brief explanation of drawings]

Fig. 1 is a principle block diagram showing the superimposition method of the present invention, Fig. 2 is a block circuit diagram showing an embodiment of the present invention, Fig. 3 is a time chart of the embodiment of the present invention, and Fig. 4 is a FIG. 5 is a schematic diagram showing a scanning line on a cathode ray tube. FIG. 5 is a schematic diagram showing an image screen on a cathode ray tube according to an embodiment of the present invention. FIG. 6 is a block circuit diagram showing an example of the conventional superimpose method. 6 is a schematic diagram showing an image screen on a cathode ray tube according to the conventional example shown in FIG. 6. FIG. 1...TV receiver circuit, 2...horizontal deflection section,
3... Deflection current sub-scanning circuit, 4... Superimpose circuit, 5... Variable oscillator,
6...Window setting section, 7...Scan conversion section,
8... Braun tube, 9... Window,
. 10... video switch, 16... cathode ray tube,
20...Vertical deflection circuit, 22...Horizontal deflection circuit, 24...Vertical deflection coil, 26...Horizontal deflection coil, 28...Window setting circuit, 30.30'...Scan conversion circuit , 40... Sampling clock, 46... Ramp wave generator, 48... Variable oscillator. Please see Figure 1 of the Block Diagram of 7 Haraaki! l'-”l ' j Kisensho branch 7ji
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Claims (1)

[Claims] A television receiver circuit (1) that receives a main video signal and displays it on a cathode ray tube (18), and a television receiver circuit (1) that receives a sub video signal and inserts and displays a video on a part or all of the cathode ray tube (18). In a television receiver equipped with a superimposition circuit (4), a deflection current sub-scanning circuit (3) is provided in the horizontal deflection section (2) of the television reception circuit (1), and the superimposition circuit (4) is provided with a deflection current subscanning circuit (3). ) is provided with a variable oscillator (5) that generates a frequency n times the reference frequency, and the window setting section (6) of the superimpose circuit (4) is connected to the deflection current sub-scanning circuit (3) and the variable oscillator ( 5), and the variable oscillator (5) is connected to the scan converter (7) of the superimpose circuit (4), and the reference frequency n
A superimposition method that simultaneously displays images based on the main video signal and images based on the sub video signal on a cathode ray tube, which is characterized by reading out the sub video signal at twice the frequency.