JPS6347183B2 - - Google Patents
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- Publication number
- JPS6347183B2 JPS6347183B2 JP56149961A JP14996181A JPS6347183B2 JP S6347183 B2 JPS6347183 B2 JP S6347183B2 JP 56149961 A JP56149961 A JP 56149961A JP 14996181 A JP14996181 A JP 14996181A JP S6347183 B2 JPS6347183 B2 JP S6347183B2
- Authority
- JP
- Japan
- Prior art keywords
- circuit
- output
- difference
- controlled oscillator
- frequency
- Prior art date
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Classifications
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L27/00—Modulated-carrier systems
- H04L27/18—Phase-modulated carrier systems, i.e. using phase-shift keying
- H04L27/22—Demodulator circuits; Receiver circuits
- H04L27/227—Demodulator circuits; Receiver circuits using coherent demodulation
- H04L27/2271—Demodulator circuits; Receiver circuits using coherent demodulation wherein the carrier recovery circuit uses only the demodulated signals
- H04L27/2273—Demodulator circuits; Receiver circuits using coherent demodulation wherein the carrier recovery circuit uses only the demodulated signals associated with quadrature demodulation, e.g. Costas loop
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- Engineering & Computer Science (AREA)
- Computer Networks & Wireless Communication (AREA)
- Signal Processing (AREA)
- Digital Transmission Methods That Use Modulated Carrier Waves (AREA)
Description
【発明の詳細な説明】
本発明は、ベースバンド型の搬送波再生回路に
関するものである。DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a baseband type carrier wave recovery circuit.
受信PSK変調波を復調する為の搬送波を再生
する搬送波再生回路は、既に種々の構成のものが
知られている。例えば、4相PSK変調波につい
ては4逓倍して無変調信号とした後、4分周する
ことにより受信信号に位相同期した搬送波を再生
する逓倍方式、復調出力で受信PSK変調波を変
調する再変調方式、コスタスループの出力を用い
たベースバンド処理方式等が知られている。 Various configurations of carrier wave regeneration circuits that regenerate carrier waves for demodulating received PSK modulated waves are already known. For example, a 4-phase PSK modulated wave is multiplied by 4 to become an unmodulated signal, and then frequency-divided by 4 to reproduce a carrier wave that is phase-synchronized with the received signal. A modulation method, a baseband processing method using the output of a Costas loop, etc. are known.
ベースバンド処理方式は、受信PSK変調波か
ら直接的に搬送波を再生するものではないから、
通常は電圧制御発振器を用いた位相同期回路を設
けるものである。例えば第1図に示すように、位
相検波器1、ベースバンド処理回路2、増幅器
3、低域波器4及び電圧制御発振器5により位
相同期回路を構成し、電圧制御発振器5の出力を
再生搬送波とするものである。 Since the baseband processing method does not directly reproduce the carrier wave from the received PSK modulated wave,
Usually, a phase locked circuit using a voltage controlled oscillator is provided. For example, as shown in FIG. 1, a phase locking circuit is configured by a phase detector 1, a baseband processing circuit 2, an amplifier 3, a low-frequency amplifier 4, and a voltage-controlled oscillator 5, and the output of the voltage-controlled oscillator 5 is converted into a regenerated carrier. That is.
しかし、第1図に示す従来のベースバンド型の
搬送波再生回路に於いては、引込範囲を広くする
と、擬似引込みの問題が生じ、この擬似引込みを
防止する為に高安定度の電圧制御水晶発振器を用
いることが提案されている。しかし、電圧制御水
晶発振器は高価であり、又引込範囲が狭くなる欠
点が生じる。 However, in the conventional baseband carrier regeneration circuit shown in Fig. 1, widening the pull-in range causes the problem of false pull-in, and in order to prevent this false pull-in, a high-stability voltage-controlled crystal oscillator is used. It is proposed to use However, voltage controlled crystal oscillators are expensive and have the disadvantage of having a narrow pull-in range.
そこで引込範囲を広くする為に、第2図に示す
ように、掃引回路10を設けると共に水晶発振器
等の高安定発振器6を設け、電圧制御発振器5の
出力の再生搬送波と、高安定発振器6の出力とを
混合回路7に加えて、周波数差成分を取出し、こ
の周波数差成分をカウンタ8でカウントし、周波
数差が予め定めた値より大きいとき、判定回路9
は掃引回路10を起動し、和回路11により掃引
回路10の出力を加算して電圧制御発振器5の制
御電圧とし、発振周波数の掃引を行なわせる。従
つて擬似引込状態では、周波数差が大きいことに
より掃引動作が行なわれ、擬似引込み状態から脱
出して再引込み動作が行なわれることになる。 Therefore, in order to widen the pull-in range, a sweep circuit 10 and a high stability oscillator 6 such as a crystal oscillator are provided as shown in FIG. The output is added to a mixing circuit 7, a frequency difference component is extracted, this frequency difference component is counted by a counter 8, and when the frequency difference is larger than a predetermined value, a determination circuit 9
starts the sweep circuit 10, adds the outputs of the sweep circuit 10 using the summation circuit 11 to obtain a control voltage for the voltage controlled oscillator 5, and sweeps the oscillation frequency. Therefore, in the pseudo-retraction state, a sweep operation is performed due to the large frequency difference, and the retraction operation is performed after escaping from the pseudo-retraction state.
しかし、擬似引込み状態から脱出させても、掃
引信号によつて他の擬似引込み点に引込まれる場
合があり、引込範囲の拡大の為には、掃引周波数
や掃引信号等の設定を慎重に行なわなければなら
ず、設定、製作、調整が容易でない欠点をもつ。 However, even if you escape from the pseudo-pull-in state, you may be pulled into another pseudo-pull-in point by the sweep signal, so in order to expand the pull-in range, carefully set the sweep frequency, sweep signal, etc. However, it has the drawback that it is not easy to set, manufacture, and adjust.
本発明の目的は上記の欠点をなくし、引込み範
囲を拡大できると共に擬似引込みを防止する搬送
波再生回路の提供にある。 SUMMARY OF THE INVENTION An object of the present invention is to provide a carrier wave regeneration circuit which can eliminate the above-mentioned drawbacks, expand the pull-in range, and prevent false pull-in.
本発明は上記の目的を達成する為に、ベースバ
ンド処理方式における再生搬送波と入力信号の受
信変調波との周波数差成分を容易に得られるよう
にして、この周波数差分成分を抽出して、この出
力を判別回路により、擬似引込み周波数以上離れ
たかを判別し、電圧制御発振器の発振周波数が入
力信号周波数に向うよう、微分回路の出力の孤立
パルスを制御信号として加えることを特徴とす
る。 In order to achieve the above object, the present invention makes it possible to easily obtain a frequency difference component between a reproduced carrier wave in a baseband processing method and a received modulated wave of an input signal, extracts this frequency difference component, and extracts the frequency difference component. A discriminating circuit determines whether the output is away from the pseudo pull-in frequency or not, and an isolated pulse of the output of the differentiating circuit is added as a control signal so that the oscillation frequency of the voltage controlled oscillator is directed toward the input signal frequency.
以下本発明の一実施例につき図に従つて説明す
る。 An embodiment of the present invention will be described below with reference to the drawings.
第3図は本発明の実施例のブロツク図であり、
第4図は第3図の場合の波形のタイムチヤートで
A,Dは低域波器30の出力波形、B,Eは判
別回路36の出力波形、C,Fは微分回路31の
出力波形である。第5図は差回路29の出力即ち
差周波数と出力電圧を示す曲線であり1,2は擬
似引込周波数とみなす周波数でVh,Veは判別回
路36の閾値電圧である。 FIG. 3 is a block diagram of an embodiment of the present invention;
FIG. 4 is a time chart of waveforms in the case of FIG. 3, where A and D are the output waveforms of the low frequency converter 30, B and E are the output waveforms of the discrimination circuit 36, and C and F are the output waveforms of the differentiator circuit 31. be. FIG. 5 is a curve showing the output of the difference circuit 29, that is, the difference frequency and the output voltage, 1 and 2 are frequencies regarded as pseudo pull-in frequencies, and Vh and Ve are threshold voltages of the discrimination circuit 36.
図中、21は入力信号を2分岐させるハイブリ
ツド回路、22,23は位相検波器、24はコス
タスルーブ型等のベースバンド処理回路、25,
26は微分回路、27,28は混合回路、29は
差回路、30,33は低域波回路、31は微分
回路、32は増幅器、34は電圧制御発振器、3
5は90゜移相器、36は判別回路である。 In the figure, 21 is a hybrid circuit that branches the input signal into two, 22 and 23 are phase detectors, 24 is a baseband processing circuit such as a Costas-Slube type, 25,
26 is a differentiation circuit, 27 and 28 are mixing circuits, 29 is a difference circuit, 30 and 33 are low frequency circuits, 31 is a differentiation circuit, 32 is an amplifier, 34 is a voltage controlled oscillator, 3
5 is a 90° phase shifter, and 36 is a discrimination circuit.
電圧制御発振器34の出力の再生搬送波は、直
接位相検波器22に又90゜移相回路35を介して
位相検波器23にそれぞれ加えられ、ハイブリツ
ド回路21で2分岐された入力信号の4相PSK
変調波の位相検波が行なわれて、ベースバンド処
理回路24に加えられる。 The regenerated carrier wave output from the voltage controlled oscillator 34 is applied directly to the phase detector 22 and to the phase detector 23 via the 90° phase shift circuit 35, and the 4-phase PSK of the input signal split into two by the hybrid circuit 21 is applied to the phase detector 23.
Phase detection of the modulated wave is performed and applied to the baseband processing circuit 24.
電圧制御発振器34の発振周波数と入力信号の
4相PSK変調波の周波数との差をωdとし、位相
検波器22,23の出力をそれぞれsin(ωd・t
+θ)cos(ωd・t+θ)とすると、ベースバン
ド処理回路24の出力は、sin4(ωd・t+θ)及
びcos4(ωd・t+θ)となる。なおベースバンド
処理回路については、例えば電子通信学会通信方
式研究会資料番号CS74−42に詳細に説明されて
いる。 Let ωd be the difference between the oscillation frequency of the voltage controlled oscillator 34 and the frequency of the 4-phase PSK modulated wave of the input signal, and let the outputs of the phase detectors 22 and 23 be sin(ωd・t
+θ)cos(ωd·t+θ), the outputs of the baseband processing circuit 24 are sin4(ωd·t+θ) and cos4(ωd·t+θ). Note that the baseband processing circuit is explained in detail in, for example, the Institute of Electronics and Communication Engineers Communication System Study Group document number CS74-42.
微分回路25,26はベースバンド処理回路2
4の出力のsin4(ωd・t+θ)及びcos4(ωd・t
+θ)をそれぞれ微分して出力するものであり、
それらの微分出力は、
d/dt{sin4(ωd・t+θ)}
=4ωd・cos4(ωd・t+θ) ……(1)
d/dt{cos4(ωd・t+θ)}
=−4ωd・sin4(ωd・t+θ) ……(2)
となる。混合回路27,28はベースバンド処理
回路24の出力と微分出力とを混合するもので、
それぞれの出力V1,V2は、
V1=4ωd・cos24(ωd・t+θ) ……(3)
V2=−4ωd・sin24(ωd・t+θ) ……(4)
となる。差回路29は出力V1,V2の差を出力す
るもので、その差出力Vは、
V=V1−V2=4ωd{cos24(ωd・t+θ)+sin24(
ωd・t+θ)}=4ωd……(5)
となる。即ち周波数差ωdの4逓倍された信号が
得られることになる。 The differentiating circuits 25 and 26 are the baseband processing circuit 2
sin4(ωd・t+θ) and cos4(ωd・t
+θ) is differentiated and output,
Their differential outputs are: d/dt{sin4(ωd・t+θ)} =4ωd・cos4(ωd・t+θ)...(1) d/dt{cos4(ωd・t+θ)} =−4ωd・sin4(ωd・t+θ) ...(2). The mixing circuits 27 and 28 mix the output of the baseband processing circuit 24 and the differential output.
The outputs V 1 and V 2 are as follows: V 1 =4ωd·cos 2 4 (ωd·t+θ) (3) V 2 =−4ωd·sin 2 4 (ωd·t+θ) (4). The difference circuit 29 outputs the difference between the outputs V 1 and V 2 , and the difference output V is expressed as V=V 1 −V 2 =4ωd{cos 2 4(ωd・t+θ)+sin 2 4(
ωd・t+θ)}=4ωd...(5) That is, a signal obtained by multiplying the frequency difference ω d by four is obtained.
差回路29の出力Vは、第5図に示す如く電圧
制御発振器34の発振周波数と入力信号の4相
PSK変調波の周波数の大小により正又は負とな
り又周波数の差の大小により低域波器30の出
力電圧は変化する。この出力電圧の波形は第4図
A,Dの如くなり、判定回路36に第5図の擬似
引込み周波数1,2以上になつた時の電圧Vh,
Veを、閾値電圧としてイを正側の閾値電圧Vh,
ロを負側の閾値電圧Veとしておく。A,Dに示
す低域波器30の出力電圧がイ,ロの閾値電圧
Vh,Veを越えるとF,Eに示す如き矩形波電圧
を判別回路36は出力する。この矩形波電圧を微
分回路31にて微分し、C,Fに示す如き微分出
力の一方{B図では立上り、E図では立下によ
る}のみを出力し電圧制御発振器34の制御電圧
として加える。このC,Fに示す孤立パルスによ
り電圧制御発振器34は発振周波数が中心周波数
になるよう動作する。このことにより自動周波数
制御(AFC)ループが構成されたことになつて
擬似引込みを防止することができる。 The output V of the difference circuit 29 is the oscillation frequency of the voltage controlled oscillator 34 and the four-phase input signal as shown in FIG.
It becomes positive or negative depending on the magnitude of the frequency of the PSK modulated wave, and the output voltage of the low frequency converter 30 changes depending on the magnitude of the difference in frequency. The waveform of this output voltage is as shown in FIG. 4A and D, and the determination circuit 36 determines the voltage Vh,
Ve is the threshold voltage, and A is the positive threshold voltage Vh,
Let b be the negative side threshold voltage Ve. The output voltages of the low frequency converter 30 shown in A and D are the threshold voltages of A and B.
When Vh and Ve are exceeded, the discrimination circuit 36 outputs rectangular wave voltages as shown at F and E. This rectangular wave voltage is differentiated by a differentiating circuit 31, and only one of the differential outputs as shown in C and F {rise in diagram B, fall in diagram E} is output and applied as a control voltage to voltage controlled oscillator . The voltage controlled oscillator 34 operates by the isolated pulses shown at C and F so that the oscillation frequency becomes the center frequency. As a result, an automatic frequency control (AFC) loop is configured and pseudo-intraction can be prevented.
又ベースバンド処理回路24の出力のcos4
(ωd・t+θ)又はsin4(ωd・t+θ)が増幅器
32及び低域波器33を介して電圧制御発振器
34の制御電圧となり、この制御電圧は、入力信
号と電圧制御発振器34の出力との位相差に対応
した値となるから、位相同期ループ(PLL)を
構成することになり、入力信号位相に同期した電
圧制御発振器34の出力即ち再生搬送波を得るこ
とができる。 Also, the cos4 output of the baseband processing circuit 24
(ωd・t+θ) or sin4(ωd・t+θ) becomes the control voltage of the voltage controlled oscillator 34 via the amplifier 32 and the low-frequency amplifier 33, and this control voltage is the level between the input signal and the output of the voltage controlled oscillator 34. Since the value corresponds to the phase difference, a phase-locked loop (PLL) is constructed, and the output of the voltage controlled oscillator 34, that is, the regenerated carrier wave, can be obtained in synchronization with the input signal phase.
第6図は電圧制御発振器の要部回路図であり、
51は可変容量ダイオード、52はコンデンサ、
53はコイル、54は発振回路であつて、可変容
量ダイオード51に印加する電圧に応じて発振周
波数が変化する。即ち微分回路31の出力の孤立
パルスは、周波数差ωdの正、負に応じた極性と
なり、低域波器33の出力の制御電圧は位相差
の正、負に応じた極性となると共に、可変容量ダ
イオード51に対して重畳されて加えられるか
ら、周波数差ωd及び位相差が零になるように制
御されるものとなる。本回路は周波数差の4倍
4ωdを求め、この周波数差4ωdが擬似引込み周波
数1,2を越えた時、微分回路31の出力にて電
圧制御発振器34の発振周波数を中心周波数とす
るので擬似引込みからの開放時間は十分早くな
る。又位相同期ループ(PLL)内の電圧制御発
振器34を直接制御するため必ず擬似引込みから
開放出来る。又、第1図及び第2図の混合回路2
7,28の出力信号の差を求めることにより、不
要信号成分が打消され、周波数差ωdの成分のみ
得られ、これを利用しているので安定な周波数制
御が可能となり、高速引込みによる搬送波再生を
行なうことが出来るものとなる。又前述の実施例
は4相の場合についてのものであるが、本発明
は、2相、8相、16相等の多相変調波についての
搬送再生にも適用し得るものである。 FIG. 6 is a circuit diagram of the main part of a voltage controlled oscillator,
51 is a variable capacitance diode, 52 is a capacitor,
53 is a coil, and 54 is an oscillation circuit, the oscillation frequency of which changes depending on the voltage applied to the variable capacitance diode 51. That is, the isolated pulse output from the differentiating circuit 31 has a polarity that corresponds to the positive or negative frequency difference ωd, and the control voltage output from the low frequency generator 33 has a polarity that corresponds to the positive or negative phase difference, and is variable. Since it is added to the capacitive diode 51 in a superimposed manner, the frequency difference ωd and the phase difference are controlled to be zero. This circuit is 4 times the frequency difference
4ωd is calculated, and when this frequency difference 4ωd exceeds the pseudo-entrainment frequencies 1 and 2 , the oscillation frequency of the voltage controlled oscillator 34 is set as the center frequency at the output of the differentiating circuit 31, so the release time from the pseudo-entraction becomes sufficiently early. . Furthermore, since the voltage controlled oscillator 34 in the phase-locked loop (PLL) is directly controlled, it can always be released from the pseudo pull-in. Moreover, the mixing circuit 2 of FIGS. 1 and 2
By calculating the difference between the output signals of 7 and 28, unnecessary signal components are canceled and only the frequency difference ωd component is obtained. Since this is used, stable frequency control is possible, and carrier wave regeneration by high-speed pull-in is possible. It becomes something that can be done. Further, although the above-mentioned embodiment is for a four-phase case, the present invention can also be applied to carrier reproduction for polyphase modulated waves such as two-phase, eight-phase, and 16-phase modulated waves.
以上詳細に説明した如く本発明によれば、引込
み範囲を拡大することができると共に、擬似引込
み状態を防止して、高速に正規な位相引込みを行
なわせることが出来る効果がある。 As described in detail above, according to the present invention, it is possible to expand the pull-in range, prevent a false pull-in state, and perform normal phase pull-in at high speed.
第1図、第2図は従来例の搬送波再生回路のブ
ロツク図、第3図は本発明の実施例の搬送波再生
回路のブロツク図、第4図は第3図の場合の低域
波器30、判別回路36、微分回路31の出力
波形のタイムチヤート、第5図は差回路29の出
力、即ち差周波数と出力電圧との関係を示す曲
線、第6図は電圧制御発振器の一例の回路図であ
る。
図中、1,7,22,23は位相検波器、2,
24はベースバンド処理回路、3,32は増幅
器、4,30,33は低域波器、5,34は電
圧制御発振器、6は水晶発振器、8はカウンタ、
9は判定回路、10は掃引回路、11は和回路、
21はハイブリツド回路、25,26,31は微
分回路、27,28は混合回路、29は差回路、
35は90゜移相器、51は可変容量ダイオード、
52はコンデンサ、53はコイル、54は発振回
路部、36は判別回路である。
1 and 2 are block diagrams of a conventional carrier wave recovery circuit, FIG. 3 is a block diagram of a carrier wave recovery circuit according to an embodiment of the present invention, and FIG. 4 is a low frequency amplifier 30 in the case of FIG. 3. , a time chart of the output waveforms of the discrimination circuit 36 and the differentiating circuit 31, FIG. 5 is a curve showing the output of the difference circuit 29, that is, a curve showing the relationship between the difference frequency and the output voltage, and FIG. 6 is a circuit diagram of an example of a voltage controlled oscillator. It is. In the figure, 1, 7, 22, 23 are phase detectors, 2,
24 is a baseband processing circuit, 3, 32 are amplifiers, 4, 30, 33 are low frequency generators, 5, 34 are voltage controlled oscillators, 6 is a crystal oscillator, 8 is a counter,
9 is a judgment circuit, 10 is a sweep circuit, 11 is a sum circuit,
21 is a hybrid circuit, 25, 26, 31 are differentiating circuits, 27, 28 are mixing circuits, 29 is a difference circuit,
35 is a 90° phase shifter, 51 is a variable capacitance diode,
52 is a capacitor, 53 is a coil, 54 is an oscillation circuit section, and 36 is a discrimination circuit.
Claims (1)
相差に応じた電圧を制御電圧として、該電圧制御
発振器を制御し、該電圧制御発振器の発振周波数
を前記入力信号に同期させる搬送波再生回路に於
て、ベースバンド処理回路の一方と他方との出力
信号をそれぞれ微分する微分回路、前記一方の出
力信号の微分信号と前記他方の出力信号とを加え
る第1の混合回路、前記他方の出力信号の微分信
号と前記一方の出力信号とを加える第2の混合回
路、該第1及び第2の混合回路の出力信号の差を
出力する差分回路、該差分回路の出力が一定値を
越えたことを判別し出力する判別回路、該判別回
路の出力を微分回路により微分し、孤立パルスを
発生さし該孤立パルスにより該電圧制御発振器の
制御電圧とする回路を備えたことを特徴とする搬
送波再生回路。1. In a carrier wave regeneration circuit that controls the voltage controlled oscillator using a voltage corresponding to the phase difference between the input signal and the output signal of the voltage controlled oscillator as a control voltage, and synchronizes the oscillation frequency of the voltage controlled oscillator with the input signal. a differentiating circuit that differentiates the output signals of one and the other of the baseband processing circuits, a first mixing circuit that adds the differentiated signal of the one output signal and the other output signal, and a first mixing circuit that adds the differential signal of the one output signal and the other output signal; a second mixing circuit that adds the differential signal and the one output signal; a difference circuit that outputs the difference between the output signals of the first and second mixing circuits; and a difference circuit that outputs the difference between the output signals of the first and second mixing circuits; A carrier wave regeneration circuit comprising: a discrimination circuit that discriminates and outputs the discrimination circuit; and a circuit that differentiates the output of the discrimination circuit using a differentiating circuit, generates an isolated pulse, and uses the isolated pulse as a control voltage for the voltage controlled oscillator. .
Priority Applications (3)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP56149961A JPS5851655A (en) | 1981-09-22 | 1981-09-22 | Carrier wave reproducing circuit |
| EP19820304203 EP0072241B1 (en) | 1981-08-10 | 1982-08-10 | Carrier recovery circuit |
| DE8282304203T DE3272570D1 (en) | 1981-08-10 | 1982-08-10 | Carrier recovery circuit |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP56149961A JPS5851655A (en) | 1981-09-22 | 1981-09-22 | Carrier wave reproducing circuit |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPS5851655A JPS5851655A (en) | 1983-03-26 |
| JPS6347183B2 true JPS6347183B2 (en) | 1988-09-20 |
Family
ID=15486381
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP56149961A Granted JPS5851655A (en) | 1981-08-10 | 1981-09-22 | Carrier wave reproducing circuit |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS5851655A (en) |
-
1981
- 1981-09-22 JP JP56149961A patent/JPS5851655A/en active Granted
Also Published As
| Publication number | Publication date |
|---|---|
| JPS5851655A (en) | 1983-03-26 |
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