JPS6355679U - - Google Patents
Info
- Publication number
- JPS6355679U JPS6355679U JP14748186U JP14748186U JPS6355679U JP S6355679 U JPS6355679 U JP S6355679U JP 14748186 U JP14748186 U JP 14748186U JP 14748186 U JP14748186 U JP 14748186U JP S6355679 U JPS6355679 U JP S6355679U
- Authority
- JP
- Japan
- Prior art keywords
- capacitor
- differentially
- input terminal
- voltage source
- gate
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 239000003990 capacitor Substances 0.000 claims description 6
- 238000010586 diagram Methods 0.000 description 2
- 238000007796 conventional method Methods 0.000 description 1
Landscapes
- Picture Signal Circuits (AREA)
Description
第１図は本考案の一例の構成図、第２図、第３
図は従来の技術の説明のための図である。
１は入力端子、２，５はコンデンサ、３，６，
１０はＭＯＳ素子、４，７，８はスイツチ、９は
電圧源、１４は出力端子、１５，１６はリーク抵
抗である。
Figure 1 is a configuration diagram of an example of the present invention, Figures 2 and 3.
The figure is a diagram for explaining a conventional technique. 1 is an input terminal, 2 and 5 are capacitors, 3, 6,
10 is a MOS element, 4, 7, and 8 are switches, 9 is a voltage source, 14 is an output terminal, and 15 and 16 are leak resistances.
Claims (1)
して差動接続された一方の素子のゲートに接続さ
れ、 上記入力端子が第１のスイツチとクランプ用の
第２のコンデンサを介して上記差動接続された他
方の素子のゲートに接続され、 上記差動接続された一方及び他方の素子のゲー
トがそれぞれ第２及び第３のスイツチを介してク
ランプ電圧源の一端に接続されると共に、 上記第１のスイツチと第２のコンデンサとの接
続中点が第３のコンデンサを介して上記クランプ
電圧源の他端に接続されるようにしたクランプ回
路。[Claims for Utility Model Registration] An input terminal is connected to the gate of one differentially connected element via a first capacitor for clamping, and the input terminal is connected to the first switch and the second capacitor for clamping. It is connected to the gate of the other differentially connected element through a capacitor, and the gates of the one and the other differentially connected element are connected to one end of the clamp voltage source through the second and third switches, respectively. and the clamp circuit is configured such that the middle point of the connection between the first switch and the second capacitor is connected to the other end of the clamp voltage source via a third capacitor.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP14748186U JPS6355679U (en) | 1986-09-26 | 1986-09-26 |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP14748186U JPS6355679U (en) | 1986-09-26 | 1986-09-26 |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPS6355679U true JPS6355679U (en) | 1988-04-14 |
Family
ID=31060882
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP14748186U Pending JPS6355679U (en) | 1986-09-26 | 1986-09-26 |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS6355679U (en) |
-
1986
- 1986-09-26 JP JP14748186U patent/JPS6355679U/ja active Pending
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