JPS6357752B2 - - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a timekeeping device, and particularly to one that displays only necessary time display digits.

BACKGROUND ART Conventionally, in large digital clocks, stopwatches, and other timekeeping devices used in sports matches, timekeeping devices with display contents suitable for the match have been used exclusively. For example, in basketball, soccer, etc., display digits for hours, minutes, and seconds are sufficient, and in swimming competitions, 10 to 1/100 digits are sufficient.
The seconds are required, and in relay races, etc., the seconds display digits from 10 o'clock are required.

As described above, in sports matches, etc., the range of time to be measured is wide, so conventional timing devices cannot be applied to all matches. For this reason,
It was necessary to purchase timing devices depending on the type of sport, which was not efficient.

The present invention has been made in view of the above-mentioned conventional problems, and its purpose is to display time only as required. Moreover, it is an object of the present invention to provide a timekeeping device that can be operated easily.

In order to achieve the above object, the present invention has a reference signal source and allows selection of time display digits such as hours, minutes, seconds, etc. by operating an externally operable switch, and at least one of the selected time display digits. It consists of a basic timekeeping body that displays one digit, and an additional timekeeping body that is equipped with timekeeping means and can be connected in series to the basic timekeeping body and can display at least one arbitrary time display digit. The time display digit of the basic timekeeping body is determined by the above, and the time measurement contents of the timekeeping means driven by the timekeeping signal from the basic timekeeping body are displayed on the additional timekeeping body.

Preferred embodiments of the present invention will be described below based on the drawings.

FIG. 1 shows an embodiment of a basic timekeeping body of a stopwatch to which the present invention is applied, and can display one hour digit, one minute digit, and one second digit.

Oscillator 2 in reference signal source 1 including crystal oscillator etc.
A high frequency pulse is outputted from the reference signal source 1, and the pulse train is supplied to the frequency dividing circuit 4 in the reference signal source 1. The frequency dividing circuit 4 sequentially divides the frequency of the supplied pulse train, and supplies a pulse train with a period of 1 second to the counter 6. Counter 6 is composed of 10 x hexadecimal, 60
A pulse train with a period of seconds is supplied to a counter 8 which is also configured in 10 x hexadecimal notation. The counter 8 supplies a pulse train with a period of 60 minutes to the counter 10 which is composed of a decimal system. These counters 6, 8, and 10 constitute a basic counter 11. Also counter 6
The count value of only the decimal part of 8 and the count value of the counter 10 are supplied to a decoder 18 via gate circuits 12, 14 and 16, respectively, and the output of the decoder 18 is supplied to a display 20.
is supplied to.

The output of the reset switch 22 is supplied to the frequency dividing circuit 4 and the reset terminals R of the counters 6, 8, and 10, and by operating the reset switch 22, counting starts from "zero". The output of the reset switch 22 is also supplied to an external output terminal RO.

A second designation switch 24, a minute designation switch 26, and an hour designation switch 2 that constitute the selection switch group 23
The output of 8 is supplied to the memory circuit 30, and its output S
to AND gate 32, output M to AND gate 3
4, the output H is supplied to the AND gate 36. The memory circuit 36 stores only the output of the operated switch, and is configured to reset the outputs of other switches. The other input terminal of the AND gate 32 receives a pulse train with a period of 10 seconds from the counter 6, the other input terminal of the AND gate 34 receives a pulse train with a period of 10 minutes from the counter 8, and the other input terminal of the AND gate 36 receives a pulse train with a period of 10 seconds from the counter 6. A pulse train with a period of 10 hours is supplied from the counter 10 to the input terminal, and the output thereof is supplied to the external output terminal CO via the OR gate 38. This AND gate 32, 34 and 36, OR gate 38
The selection gate circuit 37 is configured by the above.

Further, the output S of the memory circuit 30 is connected to the gate circuit 12,
The output M is connected to the decoder 18 and the external output terminal SO, and the output M is connected to the gate circuit 14, the decoder 18 and the external output terminal
MO and output H are also supplied to the gate circuit 16, decoder 18, and external output terminal HO. Here, the gate circuits 12 to 16 are each connected to a memory circuit 30.
The count values of counters 6 to 10 are sent to decoder 1 only when an “H” level output is supplied from
Supply to 8. In addition, "second",
The display 20 displays "minutes" and "hours."

Furthermore, in this embodiment, when the minute designation switch 26 and the hour designation switch 28 are operated, the display 2
It is configured so that seconds blink at 0.

The output M of the memory circuit 30 is sent to an AND gate 40,
The output H is supplied to an AND gate 42, and the other input terminals of both AND gates 40 and 42 are supplied with a pulse train having a period of 1 second from the frequency dividing circuit 4. The outputs of both AND gates 40 and 42 are supplied to the decoder 18 via an OR gate 44.

FIG. 2 is a block diagram showing an embodiment of the additional timekeeping body.

CI, RI, SI, MI, and HI are external input terminals, and the external output terminals CO, RO, and HI of the basic timekeeping body are respectively external input terminals.
It is connected to SO, MO and HO.

The counter 46 is configured in decimal format and has an external input terminal.
Count the pulse trains supplied from the CI and
External output terminal for decimal output via OR gate 48
Supplying CO. Further, the count outputs X ₀ to _{X 3} of the counter 46 are sent to the display 5 via the decoder 50.
2, and the count value is displayed on the display 52. The count outputs X ₀ and X ₂ are supplied to an OR gate 56 via an AND gate 54 . The AND gate 54 is also supplied with the output of a NOR gate 64, which will be described later, and the OR gate 56 is also supplied with a reset signal from an external input terminal RI.
It is supplied to the reset terminal R of. Therefore, when the output of the AND gate 54 becomes "H" level, the counter 46 is reset and performs a hexadecimal operation. Further, the count outputs X ₀ , X ₂ , the output of the NOR gate 64 and the pulse train from the external input terminal CI are supplied to the AND gate 58 , and this output is supplied to the OR gate 48 . Therefore, even when the counter 46 operates in hexadecimal format, the hexadecimal output is supplied to the external output terminal CO. This counter 46, OR gates 48, 56, and AND gates 54, 58 constitute an additional counter 59.

Note that the output of the external input terminal RI is directly supplied to the external output terminal RO.

The output of external input terminal SI is sent to AND gate 60,
The output of external input terminal HI is sent to AND gate 62,
The output of the external input terminal MI is supplied to the other input terminals of the AND gates 60 and 62, and the output thereof is supplied to the NOR gate 64.

Also, the output of external input terminal SI is AND gate 66
The output of external input terminal MI is AND gate 68.
The output of the AND gate 60 is supplied to the other input terminals of the AND gates 66 and 68 and to the OR gate 70. And the output of the AND gate 66 is the external output terminal SO and the OR gate 7
0, the output of AND gate 68 is
2 to OR gates 70 and 74. Further, the output of the AND gate 62 is supplied to an AND gate 72 and an OR gate 74, and the output of the OR gates 70 and 74 is sent to an external output terminal MO.
and HO respectively. The AND gates 60, 62, 66, 68, 72 and the NOR gate 64 constitute a selection signal detection circuit 73,
The OR gates 70 and 74 constitute a signal switching circuit 75.

The above configuration is for determining the display digit to be displayed in each additional timekeeping body, and when the output of the NOR gate 64 is "L" level, it is one digit of the hour unit, and when it is "H" level, the display digit is determined. Shows 10 digits.

FIG. 3 is a diagram showing one example of determination in this embodiment. This is an example where the digits from 1 second to 1 hour are displayed. Therefore, four additional timekeeping bodies are connected.
Here, the input and output columns indicate outputs at the "H" level.

Furthermore, in this embodiment, the digit detection circuit 79 is configured to display time units such as "hour" and "minute".
The AND gate 76 in this digit detection circuit 79 is supplied with the output of the OR gate 70, and the AND gate 78 in the digit detection circuit 79 is supplied with the output of the OR gate 74. is supplied with the output of the NOR gate 64. The outputs of both AND gates 76 and 78 are supplied to the decoder 50. Therefore, as is clear from FIG. 3, "minutes" and "hours" are displayed on the additional timepieces of the one-minute digit and one-hour digit.

The operation will be explained below based on the example shown in FIG. It goes without saying that the additional timekeeping bodies can be connected as desired, but for the sake of explanation, the additional timekeeping bodies will be referred to as 1, 2, 3, and 4 from the side connected to the basic timekeeping body.

Additional timekeeping bodies 1 to 4 as above to the basic timekeeping body
are connected in series and when the second designation switch 24 is operated, only the output S is outputted from the storage circuit 30 at the "H" level. Therefore, the gate circuit 16
and the AND gate 32 becomes open, and the display 2
At 0, time is displayed in 1-second digits, and a 10-second cycle pulse train is supplied to the external output terminal CO. At this time, the display 20 also displays the time unit "second". Furthermore, the external output terminal SO is “H”
It has become a level.

In the additional timekeeping body 1, since the external input terminal SI is at the "H" level, the output of the NOR gate 64 is "H".
level, and the counter 46 operates in hexadecimal.
Therefore, a pulse train with a period of one minute is supplied to the external output terminal CO, and the display 52 displays a 10-second digit. At this point, AND gates 76 and 7
Since the output of No. 8 is at the "L" level, no time unit display is performed. And external output terminal SO and
MO is at "H" level.

The additional timekeeping bodies 2 to 4 will be described using the same reference numerals as the additional timekeeping bodies 1.

In the additional timekeeping body 2, since the external input terminals SI and MI are at "H" level, the NOR gate 64
The output is at "L" level. Therefore, the counter 46 operates in decimal notation and supplies a pulse train with a period of 10 minutes to the external output terminal CO, and the display 52 displays a pulse train of 10 minutes.
The minute digits are displayed. Also, external output terminal MO
becomes "H" level. This result and gate 7
6 becomes the "H" level, and the time unit of "minute" is displayed on the display 52.

Following the same operation, additional timekeeping body 3 has 10
The minute digit is displayed, and the additional timekeeping body 4 displays the one hour digit and the hour unit.

As a result, after connecting the basic timekeeping body and additional timekeeping bodies 1 to 4 and operating the second designation switch 24, 1
A stopwatch is constructed that displays from the second digit to the one hour digit. Of course, when the reset switch 22 is operated, all the counters are reset and start counting from "zero".

The stopwatch that displays from the 1 second digit to the 1 hour digit has been described above, but by reducing the number of additional timepieces, it is possible to display from the 1 second digit to the 10 minute digit or even the 1 minute digit. By operating the minute designation switch 26 and hour designation switch 28, it is also possible to display from the 1 minute digit to the 1 hour digit.

As described above, according to this embodiment, a stopwatch that can display only the necessary digits from the 1 second digit to the 1 hour digit can be realized, which is very efficient.

In this embodiment, the display digits range from the 1 second digit to the 1 hour digit, but the number of digit designation switches is increased,
By using a corresponding digit judgment circuit, the range of displayed digits can be expanded,
The present invention can be applied not only to stop watches but also to large digital clocks and timers that can even display a calendar.

As explained above, according to the present invention, by simply specifying the lowest digit of the required time on the basic timepiece body and connecting the required number of additional timepiece bodies to the number of time digits, the time can be adjusted according to the purpose. It is possible to provide a highly efficient and versatile timekeeping device that can display only the time digits.

[Brief explanation of drawings]

FIG. 1 is a block diagram of a basic timekeeping body to which the present invention is applied to a stopwatch. FIG. 2 is a block diagram of an additional timekeeping body to which the present invention is applied to a stopwatch. FIG. 3 is a diagram showing an example of operation of display digit judgment according to the embodiment. 1...Reference signal source, 11...Basic counter, 2
3...Selection switch group, 37...Selection gate circuit, 59...Additional counter, 73...Selection signal generation circuit, 75...Signal conversion circuit, 79...Digit detection circuit.

Claims (1)

[Claims] 1. A reference signal source that outputs a reference signal, a basic counter circuit that receives the reference signal from this reference signal source and counts multiple types of time digits, and a time counted by this basic counter circuit. a group of selection switches having the same number as the number of digits; a memory circuit that outputs a selection signal to a corresponding output line in response to an ON operation signal of the selection switch group; and a plurality of time digit signals input from the basic counter circuit. A gate circuit that selectively outputs one time digit signal corresponding to the selection signal from this storage circuit, a decoder that converts the time digit signal from this gate circuit into a display signal, and a display signal from this decoder. a display section that displays in response; and a switch that receives input of a plurality of constant period signals having different periods from the basic counter circuit and selectively outputs one constant period signal corresponding to a selection signal from the storage circuit. A basic clock body consisting of a gate circuit, an external output terminal connected to the output line from the memory circuit and the switching gate circuit, an external input terminal connectable to the external output terminal, and the external input terminal. an additional counter that receives a constant period signal from the switching gate circuit through the external input terminal, counts the constant period signal, and outputs a carry signal when the count value reaches a set value; a signal discrimination circuit that receives a selection signal from the storage circuit and outputs a discrimination signal for changing a count value that outputs a carry signal of the additional counter based on the selection signal; and a signal that displays the count signal from the additional counter. a display device that displays the display signal from the decoder; a signal conversion circuit that outputs a selection signal that selects a time digit one digit higher than the time digit based on the signal from the signal discrimination circuit; and from the additional counter. A timekeeping device comprising: an external output terminal capable of outputting a carry signal and a selection signal from the signal conversion circuit to the outside; and at least one additional timepiece body.