JPS6360652A - Demodulation circuit - Google Patents

Abstract

PURPOSE:To simplify the constitution by supplying a part of an output signal of a frequency detector to a feedback circuit and eliminating a DC component from the rest of the output signal so as to stabilize the waveform. CONSTITUTION:When a reception signal is given to a mixer 2 together with a local oscillation signal, an intermediate frequency signal is obtained and when a detection signal is fed to a comparator 7, the DC component is eliminated from the detection signal and then a signal having a period equal to the total time of a reference phase part is obtained. An operating clock signal outputted from a synchronizing clock recovery circuit 12 is retarded and inverted and the result is fed to an OR gate 9. An output signal from the OR gate 9 is fed to a timing terminal and the signal being the retarded synchronising clock is fed to a D input terminal of a D flip-flop 10, then an NRZ signal is obtained as a Q output signal of the D flip-flop 11.

Description

[Detailed Description of the Invention] <Industrial Application Field> The present invention relates to a demodulation circuit, and more specifically, to a demodulation circuit that receives digital data subjected to PSK modulation based on a new method invented by the inventor of the present invention. The present invention relates to a novel demodulation circuit that can obtain original digital data by performing frequency detection.

<Prior Art> As a conventional method for transmitting digital signals, a method has been known in which a transmitting side sends out a PSK modulated signal and the receiving side demodulates the signal to obtain the original digital signal. ing.

This kind of PSK modulation method uses “0°” of the digital signal.
This is a method of transmitting signals that correspond to the phase of the carrier wave, and has the excellent characteristic of reducing C/N deterioration, so it has recently been widely adopted for digital signal transmission. It is becoming.

To explain the above PSK modulation method in more detail,
For example, as shown in FIG. 5, when the signal is in the mark state, the phase is linearly changed by 18
The so-called MSK method, in which the phase is linearly decreased by 180 degrees throughout one time slot period when the signal is in the space state, and the signal is in the mark state, as shown in Figure 6. , one time slot period of the signal is divided into two and the phase is increased in two steps by 90 degrees, and when the signal is in a space state, one time slot period of the signal is divided into two and the phase is increased in two steps by 90 degrees. A so-called DSK method or the like has been adopted to reduce the amount of noise.

The MSK method has the advantage that the occupied frequency band is narrow because the phase change is continuous;
This method has the advantage of being resistant to multipath fading and suitable for wideband data transmission.

Further, as a method for demodulating a signal subjected to PSK modulation as described above, a delay detection method and a synchronous detection method are generally employed.

The delayed detection method described above divides the received signal into two, delays one signal period of modulation by a delay circuit, or 1/2 signal period, and supplies it to the phase comparator, and supplies the other signal as is to the phase comparator. By doing so, the PSK modulated signal is demodulated and the original digital signal is obtained.

More specifically, in the delay detection device shown in FIG. 3A, the input voltage is Vin-cos(Ωt+θ(t)) (where Ω is the angular frequency of the carrier wave, t is the time,
θ(1) is a phase modulation function. ), the input voltage Vln is divided into two, one is supplied to one terminal of the phase comparator (22), the other is delayed by a predetermined time TR by the delay circuit (21), and the phase comparator ( 22), the signal VC supplied to the one terminal is Vc - Vln - cos (Ωt+θ(t)), and the signal Vd supplied to the other terminal is: Vd =
cos [Ω(t-TR)+θ(t-TR)1.

If, for example, the configuration shown in FIG. 3B is adopted as the phase comparator (22), and the output is proportional to the phase difference as shown in FIG. 3C, then the phase difference Δθ is Δθ ΩTR+θ(1) −〇(t-TR).

However, the delay time TR needs to be set to TR-T/2 (where T is one time slot of the signal) in the MSK system and the DSK system.

Also, ΩTR-(2n-1)π, or Ω-yr/
By setting TR-(2n-1)2 yr/T, the reference point for phase comparison can be brought to the center of the operating range of the phase shifter.

The following will explain the case of the DSK method as an example.
The same can be applied to the K method as well.

First, in the case of θ(1)-〇(t-TR)-0, since 80-ΩTR= (2n-1) yr, this point becomes the phase reference point in a state with no phase displacement. , an output corresponding to a point changed by θ(t)−θ(t−TR) from this point as a reference is obtained.

Also, the phase function θ when the signal is mark-space
(1) is as shown in Figure 4A, and θ(t-T/2
) is as shown in Figure B.

Therefore, θ(1)-θ(t-T/2) is π/2 during the mark period and 1π/2 during the space period, as shown in C in the same figure, and the output characteristics shown in the same figure are Based on this, the output waveform shown in E of the same figure is obtained. That is, an output of 3VO/4 is obtained during the mark period, and an output of VO/4 is obtained during the space period.

As a result, if the output of the phase comparator (22) exceeds vO/2, it can be determined that it is a mark, and if it is less than or equal to VO/2, it can be determined that it is a space.

The above-mentioned synchronous detection circuit divides the received signal into two and supplies each to a phase comparator, and also outputs an output signal (signal with a frequency matching the carrier frequency of the received signal) from the voltage controlled oscillator incorporated in the phase-locked loop. is supplied as is to one phase comparator, the phase of the above output signal is shifted by 90 degrees and supplied to the other phase comparator, and finally the original signal is output based on the output signal from the above phase comparator. (transmission characteristics of rGMSK modulation system) Kazuaki Murota, Kenkichi Hiraide, Journal of the Institute of Electronics and Communication Engineers 81/10 Vo.
1. J64-B LIIIO).

<Problems to be Solved by the Invention> When demodulating the PSK modulated signal using the delayed detection method, the configuration is simplified because it is sufficient to divide the received signal into two and simply delay one of them. However, when applied to digital signal transmission in a high frequency band, there is a problem that the reliability of demodulation decreases.

To explain this point in detail, the operating reference point of the differential detection method is Δθ−ΩT/2. Therefore, if the carrier wave angular frequency fluctuates by ΔΩ due to temperature fluctuations, the operating reference point will also fluctuate by ΔΩT/2. If this variation is large, mark and space judgments are
This becomes impossible depending on whether the output level of the phase comparator exceeds VO/2. For example, the carrier frequency is 2.5 GHz, and the temperature fluctuation degree of the oscillator (here we take the case of a SAW oscillator) is ±3X1.
0''-', the frequency fluctuation rate is ±750KH
Becomes z. If the data transmission rate in this case is set to 32 K bps, T = 32 m5e
c, and ΔΩT/2−23.44yr, that is, the fluctuation of the operating reference point is approximately 23.44π.

In reality, in addition to temperature fluctuations, the operating reference point is also affected by noise, interference waves due to multipath, etc., and the operating reference point fluctuates further. It becomes impossible to determine whether it is a space or a space.

The above-mentioned synchronous detection method is based on the regeneration of the carrier frequency using a Costas loop, and it does not have the disadvantages caused by frequency fluctuations unlike the phase detection method, and can perform signal demodulation with high precision. be.

However, the above synchronous detection method has the following problems.

That is, in order to obtain a signal with a frequency equal to the carrier frequency of the received signal, a voltage controlled oscillator as a local oscillator and a phase locked loop are required, which complicates the configuration and causes an increase in cost. In particular, the above problem is fatal since there is a strong demand for miniaturization, simplification, and cost reduction in radio equipment mounted on vehicles.

Furthermore, the inventor set the delay time equal to the total time of the reference phase section based on the demodulated NRZ signal, thereby reducing the total time of the reference phase section and reducing the amount of fluctuation ΔΩΔT of the operating reference point. The idea was to make it smaller and improve stability.

However, even if the above-mentioned measures are taken, there is a limit to how much stability can be improved in the current situation where carrier frequencies are becoming increasingly common, and technical difficulties may also increase. There is a problem with becoming.

To explain in more detail, if the total time of the reference phase section is made smaller, the time change rate of the phase increases and the occupied frequency band of the modulated wave becomes larger.

In addition, the video stage after detection also handles sharp pulse waves and contains high frequency components, which increases technical difficulty and worsens economic efficiency.

In addition, two types of PSK modulated waves invented by the present inventor (the sum of which forms a reference phase part of a predetermined time at the front and/or rear part of one time slot of a digital pulse signal, and in the first half of the remaining time slots) changes the phase in a predetermined direction in response to either the mark state or the space state of the transmission signal, and in the second half, restores it to the reference phase with a change opposite to the above phase change, and then changes the phase to the other state of the transmission signal. PSK that corresponds and changes the phase in the opposite direction
P which performs phase modulation to form only the reference phase portion over the entire range of one time slot of the digital pulse signal in accordance with the state of the other of the modulated wave and the transmission signal.
Based on the property that the time average value of the instantaneous angular frequency of the SK modulated wave is equal to the carrier angular frequency, the carrier angular frequency of the intermediate frequency signal is stabilized by feedback controlling the local oscillation frequency at which the received signal is mixed, We also considered a method for delay detection of this stabilized signal.

In such a method, in order to perform delayed detection,
There is a problem in that a delay circuit, a phase comparator, etc. constituted by a shift register are required, and the configuration cannot be simplified.

<Object of the invention> This invention was made in view of the above problems,
It is an object of the present inventor to provide a demodulation circuit which can easily and accurately demodulate a signal subjected to PSK modulation using the above method invented by the inventor, and which can have a simplified configuration. .

Means for Solving the Problems> To achieve the above object, the demodulation circuit of the present invention has the following features:
The sum of the front and/or rear parts within one time slot of the digital pulse signal forms a reference phase part of a predetermined time, and the first half of the remaining time slots corresponds to either the mark state or the space state of the transmission signal. In the second half, the phase is restored to the reference phase by a change opposite to the above phase change, and the phase is changed in the opposite direction to the mark state in response to the opposite state of the transmission signal. a mixer that receives a signal that has been sent out after being phase-modulated so that the phase changes or does not change the phase at all, and obtains an intermediate frequency signal by mixing it with a local oscillation signal from a variable frequency local oscillator; A frequency detector detects the frequency of the intermediate frequency signal output from the frequency detector, and a part of the output from the frequency detector is fed back to the variable frequency local oscillator in a state in which high frequency components are removed from the output of the intermediate frequency signal after mixing. A low-pass filter that stabilizes the carrier frequency, a DC component removal circuit that receives the remainder of the output signal from the frequency detector as input, a comparator that receives the output signal from the DC component removal circuit, and a It has a stabilization and restoration circuit that receives an output signal, stabilizes it, and restores it to a predetermined signal.

Effect> With the demodulation circuit having the above configuration, a reference phase part whose sum total is a predetermined time is formed at the front and/or rear part within one time slot of the digital pulse signal, and in the first half of the remaining time slots, The phase is changed in a predetermined direction corresponding to either the mark state or the space state of the transmission signal, and in the second half, the phase is restored to the reference phase by a change opposite to the above phase change, and the state of the transmission signal is opposite to the above state. A modulated wave that is phase-modulated to change the phase in the opposite direction to that in the mark state, or to not change the phase at all, has the property that the average frequency is equal to the carrier angular frequency. Therefore, the above modulated wave and the output signal from the variable frequency local oscillator are mixed by a mixer to convert it into an intermediate frequency signal, the frequency is detected by a frequency detector, and a part of the output signal from the frequency detector is Control the local oscillation frequency by feeding back to the variable frequency local oscillator through a low-pass filter,
The carrier frequency of the intermediate frequency signal can be stabilized.

Then, after removing the DC component by supplying the remaining part of the output signal from the frequency detector to the DC component removal circuit,
By comparing the signal with a predetermined reference level using a comparator and supplying the output signal from the comparator to a stabilizing and restoring means, the signal can be stabilized and then restored to a predetermined signal.

To explain in more detail, in the demodulation method for which the patent applicant filed a patent application on August 29, 1986, the above modulated wave is modulated by utilizing the property that the average frequency of the modulated wave is equal to the carrier frequency. The output of the variable frequency local oscillator is mixed with the output of the variable frequency local oscillator, converted into an intermediate frequency signal, a portion of which is returned to the feedback circuit for frequency detection, and then supplied to the variable frequency local oscillator through a low-pass filter to determine the local oscillation frequency. A method to control and stabilize the carrier frequency of intermediate frequency signals was proposed.

In the above patent application, a digital signal is demodulated by delay detection of a stabilized intermediate frequency signal.

Incidentally, since frequency is the differential value of phase with respect to time, in terms of operating principle, the frequency detector corresponds to the limit where the delay time is zero.

Therefore, the frequency detector is not provided in the feedback circuit as in the invention related to the above patent application, but is provided in the main circuit, and at the same time, a part of the output signal of the frequency detector is supplied to the feedback circuit, and at the same time, a part of the output signal of the frequency detector is supplied to the feedback circuit. By removing the DC component from the remaining part and stabilizing the waveform, the delay detection section such as the delay circuit and phase comparator used in the invention related to the above patent application can be omitted, simplifying the configuration. , and cost reduction can be achieved.

<Example> Hereinafter, embodiments will be described in detail with reference to the accompanying drawings showing examples.

FIG. 2 is a diagram illustrating a modulation method for generating a signal demodulated by the demodulation circuit of the present invention, and FIG. 2A and B show the time tl before and after the phase change section, respectively.

It forms reference phase portions of t2. However, tl+
The times tl and t2 are set so as to be t2 - ΔT (where ΔT is a predetermined time shorter than one time slot T of the digital signal).

Then, in the remaining period of the time slot, in the case of a mark, the phase is changed to a predetermined phase θ at the beginning of the period, and changed to phase 0 at the end, as shown in FIG. Conversely, in the case of a space, the phase is changed to -θ, 0, which is the opposite of the case of a mark, as shown in FIG.

Figure 2 C and D show the above times tl and t2 as tl - ΔT,
This shows the case where the phase is set to t2-0, and the phase change in the remaining portion is the same as in the case of FIGS. 2A and B above.

However, the characteristics do not change between the cases shown in FIGS. 2A and 2B and the cases shown in FIGS. 2C and D. In other words, as long as the relationship tl + t2 - ΔT is satisfied, the characteristics will not change, as will be clear from the explanation below.
The case will be explained below. However, the delay time TR is set to ΔT.

FIG. 2C is a diagram showing the mark signal, and the phase θ(1) is θ0 between 0≦t and ΔT, and ΔT≦t and ΔT+T.
θ0+g(t-ΔT), ΔT+T- between ″/2
It is expressed as 00+g(T-t) between /2≦t<T.

In addition, the second diagram is a diagram showing the space, and the phase θ(t
) is θ0 between 0≦t and ΔT, and △T≦t and △T
+T”/2, θ0-g (-ΔT), △T+
It is expressed as 00-g(T-t) between T-/2≦t<T.

However, the above g (t) is a phase change function, and T″/
2 is 1/2 time of the portion other than the reference phase portion.

FIG. 1 is an electric circuit diagram showing an embodiment of the demodulation circuit of the present invention, in which a voltage controlled oscillator (hereinafter referred to as
A received signal (angular frequency is ΩS) is supplied to mixer (2), which is supplied with a local oscillation signal (angular frequency is ΩL) output from mixer (2) (abbreviated as vCO) (1). The output signal is passed through a bandpass filter (3
) and an amplifier (4) to a frequency detector (5), and the output signal from the frequency detector (5) is supplied to a comparator (7) through a capacitor (6).

Then, it is supplied to the VCO (1) through the frequency detector (the output signal from the mouth is low-pass filtered) 8).

Furthermore, the signal output from the comparator]7) is supplied to the timing input terminal of the D flip-flop (00) through the OR gate (9), and the Q output signal of the D flip-flop (00) is sent to the D flip-flop (11). D
The Q output signal of the D flip-flop (11) is output as an NRZ signal. Then, the synchronous clock signal output from the synchronous clock regeneration circuit (12) which receives the Q output signal of the D flip-flop (11) is transmitted to the delay circuit (13) and the inverter (
14) to the OR gate (9), and through delay circuits (15) and (1B), respectively.
It is supplied to the D input terminal of the D flip-flop 1M and the timing input terminal of the P flip-flop (11).

The operation of the demodulation circuit having the above configuration is as follows.

The received signal is supplied to the mixer (2) together with the local oscillation signal from the local oscillator (1) to obtain an intermediate carrier signal, and after noise components are removed by the bandpass filter (3), the amplifier (4), the signal is amplified to a predetermined level and supplied to the frequency detector (5).

The detected signal obtained by the frequency detector (5) is then supplied to the comparator through the capacitor (6), thereby generating a signal from which the DC component has been removed from the detected signal, that is, a normal delay detection device. Delay time ΔT equal to the total time of the reference phase section in the constituent phase comparator circuit
A signal equivalent to that obtained when is set to an extreme value close to zero is obtained.

Then, the operating clock signal output from the synchronous clock regeneration circuit (12) is delayed by a predetermined time by a delay circuit (13), and the signal is inverted by an inverter (14), and the signal is output from the comparator (7). A signal is fed to an OR gate (9). The output signal from the OR gate (9) is supplied to the timing terminal, and a signal obtained by delaying the synchronized clock signal by a predetermined time by the delay circuit (15) is supplied to the D input terminal. The output signal of is supplied to the D input terminal of the D flip-flop (11). Furthermore, the timing terminal of the D flip-flop (11) is
Since a signal obtained by delaying the synchronous clock signal by a predetermined time by the delay circuit (1B) is supplied, an NRZ signal can be obtained as the Q output signal.

As is clear from the above explanation, in the above embodiment, since the intermediate carrier angular frequency is supplied to the frequency detector (9) in a stabilized state, the total time ΔT of the reference phase section is made too small. This is not necessary, and the occupied frequency bandwidth can be suppressed.

In addition, it is possible to eliminate the need for a delay circuit consisting of a shift register and a phase comparator, which are required when performing delayed detection.
The configuration can be simplified.

It should be noted that the present invention is not limited to the above-described embodiment; for example, the present invention is not limited to the above-mentioned embodiments; In addition to being applicable to the case of receiving and demodulating a signal sent out by applying phase modulation without phase change, various design changes can be made without changing the gist of the invention. Is possible.

<Effects of the Invention> As described above, the present invention forms a reference phase portion whose sum is a predetermined time at the front and/or rear of one time slot of a digital pulse signal, and transmits a transmission signal in the first half of the remaining time slots. The phase is changed in a predetermined direction in response to either the mark state or the space state of A PSK modulated wave whose phase is changed in the opposite direction, or one of the digital pulse signals corresponding to the other state of the above transmission signal.
An intermediate carrier frequency signal is obtained by receiving a PSK signal which is phase modulated to form only a reference phase portion over the entire range of the time slot and mixing it with an output signal from a feedback-controlled local oscillator. By frequency-detecting the frequency signal and removing the DC component, a signal proportional to the differentially detected signal can be obtained, so there is no need to reduce the total time of the reference phase part in the PSK modulated signal, and the In addition to suppressing the frequency bandwidth, it also eliminates the need for a delay circuit consisting of a shift register and a phase comparator required for delayed detection, making it possible to simplify the configuration. Moreover, it has the unique effect of being able to obtain the original digital signal with high precision.

[Brief explanation of the drawing]

FIG. 1 is an electric circuit diagram showing one embodiment of a demodulation circuit, FIG. 2 is a diagram explaining one embodiment of a modulation method, FIG. 3 is a diagram explaining a conventional delay detection device, and FIG. FIGS. 3A and 3B are diagrams for explaining the operation of the differential detection device, and FIGS. 5 and 6 are diagrams for explaining conventional modulation systems. (1)...Voltage controlled oscillator, (2)...Mixer, (
5) Frequency detector, (6) Capacitor, Port... Converter +A) Figure 3 (C) Phase difference Δ0 Figure 4 Figure 5 Figure 6

Claims (1)

[Claims] 1. 1 time slot of digital pulse signal summation to the front and/or back within the cut forms the reference phase part for a given time, and the residual In the first half of the time slot, transmission Mark state or space shape of transmitted signal correspond to one of the following conditions. The phase is changed in a specified direction, and the second half is The reference phase is set by a change opposite to the above phase change. to the other state of the transmitted signal. Correspondingly, set the phase in the opposite direction to the above case. or change the phase at all. Sends with phase modulation to prevent variable frequency local oscillator. Local oscillation signal from the oscillator and mixing A mixer that obtains an intermediate frequency signal by and the intermediate frequency signal output from the mixer A frequency detector that detects the frequency of the A high frequency component is generated from a part of the output from the frequency detector. The above variable frequency local part is removed. By feeding back to the oscillator Carrier frequency of intermediate frequency signal after mixing with a low-pass filter to stabilize the number of The remainder of the output signal from the frequency detector is The input DC component removal circuit and the DC component Input the output signal from the component removal circuit. Input the comparator and the output signal from the comparator stabilization, and return to a given signal. It has a stabilizing and restoring circuit that performs the original operation. A demodulation circuit characterized by: