JPS6360992U - - Google Patents
Info
- Publication number
- JPS6360992U JPS6360992U JP15499186U JP15499186U JPS6360992U JP S6360992 U JPS6360992 U JP S6360992U JP 15499186 U JP15499186 U JP 15499186U JP 15499186 U JP15499186 U JP 15499186U JP S6360992 U JPS6360992 U JP S6360992U
- Authority
- JP
- Japan
- Prior art keywords
- time
- counting
- information
- storage means
- switch
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Landscapes
- Electric Clocks (AREA)
Description
第１図は本考案の時計装置の平面図、第２図は
第１図の表示装置１の構成図、第３図はこの時計
装置の全体ブロツク回路図、第４図は第３図で示
したスイツチ部２２とスイツチ制御部１６の構成
図、第５図は第３図で示した時刻、メモ記憶回路
部１５の構成図、第６図は第５図で示したＲＡＭ
４１の構成図、第７図は通常表示モード時の表示
状態図、第８図はスイツチＳ１の操作に伴つて変
遷する時刻メモ表示モード時の表示状態図である
。
１……表示装置、１３……計時計数回路、１５
……時刻、メモ記憶回路部、１６……スイツチ制
御部、４１……ＲＡＭ、４５……バツフア、４５
ａ……日時記憶部、４５ｂ……メモ記憶部。
FIG. 1 is a plan view of the clock device of the present invention, FIG. 2 is a block diagram of the display device 1 shown in FIG. 1, FIG. 3 is an overall block circuit diagram of this clock device, and FIG. 4 is shown in FIG. 5 is a block diagram of the switch section 22 and switch control section 16, FIG. 5 is a block diagram of the time shown in FIG. 3, a block diagram of the memo storage circuit section 15, and FIG.
41, FIG. 7 is a display state diagram in the normal display mode, and FIG. 8 is a display state diagram in the time memo display mode, which changes as the switch S1 is operated. 1... Display device, 13... Counting circuit, 15
... Time, memo storage circuit section, 16 ... Switch control section, 41 ... RAM, 45 ... Buffer, 45
a...Date and time storage section, 45b...Memo storage section.
Claims (1)
計数手段と、 スイツチの記憶操作により前記計時計数手段で
計時された時刻を記憶する時刻記憶手段と、 スイツチの入力操作により入力された情報を、
前記時刻記憶手段に記憶された時刻に対応させて
記憶する情報記憶手段と、 スイツチの読出し操作により、前記記憶された
時刻と、この時刻に対応した情報とを読出し表示
する読出し制御手段とを具備することを特徴とす
る時計装置。[Scope of Claim for Utility Model Registration] A clock counting means for counting time and the like by counting time reference signals; a time storage means for storing the time measured by the clock counting means by a memory operation of the switch; The information entered through the input operation,
Information storage means for storing information in correspondence with the time stored in the time storage means; and readout control means for reading out and displaying the stored time and information corresponding to this time by a read operation of a switch. A clock device characterized by:
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP15499186U JPS6360992U (en) | 1986-10-09 | 1986-10-09 |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP15499186U JPS6360992U (en) | 1986-10-09 | 1986-10-09 |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPS6360992U true JPS6360992U (en) | 1988-04-22 |
Family
ID=31075287
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP15499186U Pending JPS6360992U (en) | 1986-10-09 | 1986-10-09 |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS6360992U (en) |
-
1986
- 1986-10-09 JP JP15499186U patent/JPS6360992U/ja active Pending
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