JPS6362894B2 - - Google Patents
Info
- Publication number
- JPS6362894B2 JPS6362894B2 JP58245064A JP24506483A JPS6362894B2 JP S6362894 B2 JPS6362894 B2 JP S6362894B2 JP 58245064 A JP58245064 A JP 58245064A JP 24506483 A JP24506483 A JP 24506483A JP S6362894 B2 JPS6362894 B2 JP S6362894B2
- Authority
- JP
- Japan
- Prior art keywords
- film
- thin film
- semiconductor thin
- light transmission
- forming
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired
Links
Classifications
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
- H10P14/00—Formation of materials, e.g. in the shape of layers or pillars
- H10P14/20—Formation of materials, e.g. in the shape of layers or pillars of semiconductor materials
- H10P14/29—Formation of materials, e.g. in the shape of layers or pillars of semiconductor materials characterised by the substrates
- H10P14/2926—Crystal orientations
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
- H10P14/00—Formation of materials, e.g. in the shape of layers or pillars
- H10P14/20—Formation of materials, e.g. in the shape of layers or pillars of semiconductor materials
- H10P14/38—Formation of materials, e.g. in the shape of layers or pillars of semiconductor materials characterised by treatments done after the formation of the materials
- H10P14/3802—Crystallisation or recrystallisation of non-monocrystalline semiconductor materials, e.g. regrowth
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
- H10P14/00—Formation of materials, e.g. in the shape of layers or pillars
- H10P14/20—Formation of materials, e.g. in the shape of layers or pillars of semiconductor materials
- H10P14/29—Formation of materials, e.g. in the shape of layers or pillars of semiconductor materials characterised by the substrates
- H10P14/2901—Materials
- H10P14/2902—Materials being Group IVA materials
- H10P14/2905—Silicon, silicon germanium or germanium
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
- H10P14/00—Formation of materials, e.g. in the shape of layers or pillars
- H10P14/20—Formation of materials, e.g. in the shape of layers or pillars of semiconductor materials
- H10P14/32—Formation of materials, e.g. in the shape of layers or pillars of semiconductor materials characterised by intermediate layers between substrates and deposited layers
- H10P14/3202—Materials thereof
- H10P14/3204—Materials thereof being Group IVA semiconducting materials
- H10P14/3211—Silicon, silicon germanium or germanium
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
- H10P14/00—Formation of materials, e.g. in the shape of layers or pillars
- H10P14/20—Formation of materials, e.g. in the shape of layers or pillars of semiconductor materials
- H10P14/32—Formation of materials, e.g. in the shape of layers or pillars of semiconductor materials characterised by intermediate layers between substrates and deposited layers
- H10P14/3202—Materials thereof
- H10P14/3238—Materials thereof being insulating materials
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
- H10P14/00—Formation of materials, e.g. in the shape of layers or pillars
- H10P14/20—Formation of materials, e.g. in the shape of layers or pillars of semiconductor materials
- H10P14/32—Formation of materials, e.g. in the shape of layers or pillars of semiconductor materials characterised by intermediate layers between substrates and deposited layers
- H10P14/3202—Materials thereof
- H10P14/3241—Materials thereof being conductive materials
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
- H10P14/00—Formation of materials, e.g. in the shape of layers or pillars
- H10P14/20—Formation of materials, e.g. in the shape of layers or pillars of semiconductor materials
- H10P14/32—Formation of materials, e.g. in the shape of layers or pillars of semiconductor materials characterised by intermediate layers between substrates and deposited layers
- H10P14/3242—Structure
- H10P14/3244—Layer structure
- H10P14/3251—Layer structure consisting of three or more layers
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
- H10P14/00—Formation of materials, e.g. in the shape of layers or pillars
- H10P14/20—Formation of materials, e.g. in the shape of layers or pillars of semiconductor materials
- H10P14/32—Formation of materials, e.g. in the shape of layers or pillars of semiconductor materials characterised by intermediate layers between substrates and deposited layers
- H10P14/3242—Structure
- H10P14/3256—Microstructure
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
- H10P14/00—Formation of materials, e.g. in the shape of layers or pillars
- H10P14/20—Formation of materials, e.g. in the shape of layers or pillars of semiconductor materials
- H10P14/34—Deposited materials, e.g. layers
- H10P14/3402—Deposited materials, e.g. layers characterised by the chemical composition
- H10P14/3404—Deposited materials, e.g. layers characterised by the chemical composition being Group IVA materials
- H10P14/3411—Silicon, silicon germanium or germanium
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
- H10P14/00—Formation of materials, e.g. in the shape of layers or pillars
- H10P14/20—Formation of materials, e.g. in the shape of layers or pillars of semiconductor materials
- H10P14/34—Deposited materials, e.g. layers
- H10P14/3451—Structure
- H10P14/3452—Microstructure
- H10P14/3458—Monocrystalline
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
- H10P14/00—Formation of materials, e.g. in the shape of layers or pillars
- H10P14/20—Formation of materials, e.g. in the shape of layers or pillars of semiconductor materials
- H10P14/38—Formation of materials, e.g. in the shape of layers or pillars of semiconductor materials characterised by treatments done after the formation of the materials
- H10P14/3802—Crystallisation or recrystallisation of non-monocrystalline semiconductor materials, e.g. regrowth
- H10P14/3818—Crystallisation or recrystallisation of non-monocrystalline semiconductor materials, e.g. regrowth using particle beams
Landscapes
- Photovoltaic Devices (AREA)
- Recrystallisation Techniques (AREA)
- Electrodes Of Semiconductors (AREA)
Description
【発明の詳細な説明】
〔発明の技術分野〕
本発明は、半導体薄膜結晶層の製造方法に係わ
り、特に絶縁体上の半導体薄膜を電子ビーム照射
により溶融再結晶化する半導体薄膜結晶層の製造
方法に関する。[Detailed Description of the Invention] [Technical Field of the Invention] The present invention relates to a method for manufacturing a semiconductor thin film crystal layer, and particularly to a method for manufacturing a semiconductor thin film crystal layer in which a semiconductor thin film on an insulator is melted and recrystallized by electron beam irradiation. Regarding the method.
周知の如く、従来の二次元半導体装置の素子を
微細化してこれを高集積化・高速化するには限界
があり、これを越える手段として最近多層に素子
を形成する、いわゆる三次元半導体装置が提案さ
れている。さらに、これを実現するため、基板
（絶縁膜）上の多結晶或いは非晶質半導体に高エ
ネルギーのレーザビームや電子ビームを照射しな
がら走査して粗大粒の多結晶若しくは単結晶の半
導体薄膜結晶層を形成する方法が種々提案されて
いる。
As is well known, there is a limit to miniaturizing the elements of conventional two-dimensional semiconductor devices to increase their integration and speed, and as a means to overcome this, so-called three-dimensional semiconductor devices, in which elements are formed in multiple layers, have recently been developed. Proposed. Furthermore, in order to realize this, the polycrystalline or amorphous semiconductor on the substrate (insulating film) is scanned while irradiated with a high-energy laser beam or electron beam to form a coarse-grained polycrystalline or single-crystalline semiconductor thin film crystal. Various methods for forming layers have been proposed.
これらのうち、電子ビームの場合は良く用いら
れている方法を第１図に示す。シリコン基板１１
上に形成されたSiO2膜１２上に非晶質のシリコ
ン層１３を形成し、さらにその上に保護用の
SiO2膜１４を形成した後、高エネルギーの電子
ビームを照射しながら走査して、シリコンを溶融
再結晶化して、単結晶化させる。この時、保護用
のSiO2膜１４を通してシリコン層１３に入射さ
れた電子は、運動エネルギーを失うことによりシ
リコン層１３の温度を上昇させるが、電子は連続
的に入射されるため、シリコン層１３中を拡散し
ながら遠方に逃げていくことになる。 Among these methods, a method commonly used in the case of an electron beam is shown in FIG. silicon substrate 11
An amorphous silicon layer 13 is formed on the SiO 2 film 12 formed above, and a protective layer is further formed on it.
After forming the SiO 2 film 14, a high-energy electron beam is irradiated and scanned to melt and recrystallize the silicon to form a single crystal. At this time, the electrons incident on the silicon layer 13 through the protective SiO 2 film 14 lose kinetic energy and increase the temperature of the silicon layer 13, but since the electrons are continuously incident, the temperature of the silicon layer 13 increases. It will spread inside and escape to a faraway place.
ところが、シリコン層１３の不純物濃度が低い
場合、シリコンの電気抵抗が高く、流れ得る電流
が小さいため、入射された電子がシリコン層１３
を十分拡散してしまわないうちに次の電子が入射
されてシリコン層１３の局部に電子が溜つてく
る。この場合、シリコン基板１１に対して、シリ
コン層１３の電位が下がるため、SiO2膜１２に
大きな電圧が掛かり、SiO2膜１２が絶縁破壊し
てしまう虞れがあつた。 However, when the impurity concentration of the silicon layer 13 is low, the electric resistance of silicon is high and the current that can flow is small.
Before the silicon layer 13 is sufficiently diffused, the next electron is incident, and the electrons accumulate locally in the silicon layer 13. In this case, since the potential of the silicon layer 13 is lowered with respect to the silicon substrate 11, a large voltage is applied to the SiO 2 film 12, and there is a risk that the SiO 2 film 12 will undergo dielectric breakdown.
本発明の目的は、絶縁体上に良質の半導体薄膜
結晶層を形成することができ、三次元半導体装置
の素子形成基板等の実現に好適する半導体薄膜結
晶層の製造方法を提供することにある。
An object of the present invention is to provide a method for manufacturing a semiconductor thin film crystal layer that can form a high quality semiconductor thin film crystal layer on an insulator and is suitable for realizing an element formation substrate of a three-dimensional semiconductor device. .
本発明の骨子は、溶融再結晶化すべき半導体薄
膜中に直接電子ビームを入射しないで、半導体薄
膜を間接的に昇温することにより、下地絶縁膜の
絶縁破壊等の損傷を起こさないで、均一で良質な
半導体薄膜結晶層を製造することにある。
The gist of the present invention is to heat the semiconductor thin film indirectly without directly injecting an electron beam into the semiconductor thin film to be melted and recrystallized. The objective is to produce high-quality semiconductor thin film crystal layers.
即ち本発明は、絶縁体上に粗大粒の多結晶若し
くは単結晶の半導体薄膜結晶層を形成する方法に
おいて、絶縁体上に多結晶或いは非晶質の半導体
薄膜を形成したのち、この薄膜上に絶縁膜を介し
て金属膜を形成し、次いでこの金属膜上に光の透
過を防止する少なくとも一層の光透過防止膜を形
成し、しかるのち上記光透過防止膜上から電子ビ
ームを照射し前記半導体薄膜を間接的に昇温して
溶融再結晶化するようにした方法である。 That is, the present invention provides a method for forming a coarse-grained polycrystalline or single-crystalline semiconductor thin film crystal layer on an insulator, after forming a polycrystalline or amorphous semiconductor thin film on the insulator. A metal film is formed via an insulating film, and then at least one light transmission prevention film is formed on the metal film to prevent light transmission, and then an electron beam is irradiated from above the light transmission prevention film to remove the semiconductor. This is a method in which the temperature of the thin film is indirectly raised to melt and recrystallize it.
本発明によれば、金属膜の存在により電子ビー
ムは金属膜中を拡散し該膜を加熱する。このた
め、半導体薄膜の局部に電子が溜ることがなく、
また金属膜はその電気抵抗が極めて小さいので金
属膜の局部に電子が溜る等の不都合もない。従つ
て、下地絶縁膜の絶縁破壊等を未然に防止するこ
とができる。また、光透過防止膜の存在により金
属膜中の熱が黒体輻射により上方に拡散するのを
防止でき、下層の半導体薄膜を十分アニールする
ことができる。従つて、均一で良質の半導体薄膜
結晶層を形成することができ、三次元半導体装置
の素子形成基板として実用上十分な特性を持たせ
ることができる。
According to the present invention, the presence of the metal film causes the electron beam to diffuse through the metal film and heat the film. Therefore, electrons do not accumulate locally in the semiconductor thin film,
Furthermore, since the electrical resistance of the metal film is extremely low, there is no problem such as accumulation of electrons locally in the metal film. Therefore, dielectric breakdown of the underlying insulating film can be prevented. Further, the presence of the light transmission prevention film can prevent the heat in the metal film from being diffused upward by black body radiation, and the underlying semiconductor thin film can be sufficiently annealed. Therefore, a uniform and high-quality semiconductor thin film crystal layer can be formed, and it can be provided with practically sufficient characteristics as an element formation substrate of a three-dimensional semiconductor device.
第２図ａ〜ｃは本発明の一実施例に係わる半導
体薄膜結晶層の製造工程を示す断面図である。ま
ず、第２図ａに示す如く、例えばＰ型（100）面
方位の単結晶シリコン基板２１の表面に絶縁膜と
して約１〔μｍ〕のSiO2膜２２を形成する。ただ
し、シリコン基板２１上には既に所望の素子が周
知の工程を経て形成されているものとする。次い
で、第２図ｂに示す如くSiO2膜２２上に例えば
0.5〔μｍ〕の非晶質シリコン層（半導体薄膜）２
３を被着し、このシリコン層２３上に厚さ0.2〔μ
ｍ〕の保護用SiO2膜２４を被着する。ここまで
の工程は従来と同様であるが、本実施例ではこの
後第２図ｃに示す如くSiO2膜２４上に１〔μｍ〕
のタングステン膜（金属膜）２５及び0.5〔μｍ〕
の光透過防止用Si膜２６を形成する。
FIGS. 2a to 2c are cross-sectional views showing the manufacturing process of a semiconductor thin film crystal layer according to an embodiment of the present invention. First, as shown in FIG. 2a, a SiO 2 film 22 of about 1 [μm] thickness is formed as an insulating film on the surface of a single crystal silicon substrate 21 having, for example, a P-type (100) plane orientation. However, it is assumed that desired elements have already been formed on the silicon substrate 21 through well-known processes. Next, as shown in FIG. 2b , for example,
0.5 [μm] amorphous silicon layer (semiconductor thin film) 2
3 to a thickness of 0.2 [μ
A protective SiO 2 film 24 of [m] is deposited. The process up to this point is the same as the conventional one, but in this example, as shown in FIG .
Tungsten film (metal film) 25 and 0.5 [μm]
A Si film 26 for preventing light transmission is formed.
次に、上記シリコン基板２１を500〔℃〕にまで
昇温した後、Si膜２６の上から電子ビームを照射
する。ここで、電子ビームとしては連続電子ビー
ムを用い、ビーム加速電圧を10〔KeV〕、タング
ステン膜２５に入射されるビーム電流を２〔mA〕
とした。シリコン基板２１の上部より入射された
電子ビームは第３図ａに示すような到達深度の分
布を持つため、電子はタングステン膜２５の下層
のSiO2膜２４まで到達しないでタングステン膜
２５中で殆ど運動エネルギーを失い、タングステ
ン膜２５の温度を上昇させる。この後、タングス
テン膜２５中を電子が拡散していくがタングステ
ンの電気抵抗が小さいため、タングステン膜２５
の電位は殆ど上昇しない。また、電子はタングス
テン中で殆ど運動エネルギーを失うのでタングス
テンの温度が上昇するが、タングステンは金属で
あるため熱伝導も大きいので、熱の拡散も速い。
また、タングステン膜２５の上に光透過防止膜と
してSi膜２６を被着しているので、黒体輻射によ
る上方への熱の放散が妨げられる。このため、深
さ方向に熱が伝わり易く温度の深さ方向の分布は
第３図ｂに示す如くなり、タングステン膜２５の
下のシリコン層２３が間接的に昇温されて溶融再
結晶化が起り、電子による絶縁破壊等の損傷を受
けないで単結晶化することが可能になつた。 Next, after heating the silicon substrate 21 to 500 [° C.], an electron beam is irradiated onto the Si film 26. Here, a continuous electron beam is used as the electron beam, the beam acceleration voltage is 10 [KeV], and the beam current incident on the tungsten film 25 is 2 [mA].
And so. Since the electron beam incident from the upper part of the silicon substrate 21 has a distribution of depth of arrival as shown in FIG . Kinetic energy is lost and the temperature of the tungsten film 25 increases. After this, electrons diffuse through the tungsten film 25, but since the electrical resistance of tungsten is small, the tungsten film 25
The potential hardly increases. Furthermore, since electrons lose most of their kinetic energy in tungsten, the temperature of tungsten rises, but since tungsten is a metal, it has high thermal conductivity, so heat diffuses quickly.
Further, since the Si film 26 is deposited on the tungsten film 25 as a light transmission prevention film, upward dissipation of heat due to black body radiation is prevented. Therefore, heat is easily transmitted in the depth direction, and the temperature distribution in the depth direction becomes as shown in FIG. This has made it possible to form single crystals without suffering damage such as dielectric breakdown caused by electrons.
かくして本実施例によれば、タングステン膜２
５に電子ビームを入射しシリコン層２３を間接的
に昇温して再結晶化しているので、シリコン層２
３の電位が下がるのを防止でき、絶縁膜２２の絶
縁破壊を招くことなくシリコン層２３を単結晶化
することができる。このため、太陽電池等の素子
形成基板の製造等に極めて有効である。 Thus, according to this embodiment, the tungsten film 2
Since the electron beam is incident on the silicon layer 23 and the silicon layer 23 is indirectly heated and recrystallized, the silicon layer 23 is recrystallized.
3 can be prevented from decreasing, and the silicon layer 23 can be made into a single crystal without causing dielectric breakdown of the insulating film 22. Therefore, it is extremely effective in manufacturing substrates for forming elements such as solar cells.
なお、本発明は上述した実施例に限定されるも
のではない。例えば、前記金属膜はタングステン
に限るものではなく、高融点金属であれば望まし
く、さらにその膜厚も適宜変更可能である。ま
た、前記光透過防止膜として、Si膜の代りにSiN
膜を用いてもよい。SiN膜の場合Si膜に比べて黒
体輻射を防止する能力が小さいので、シリコン層
の溶融再結晶化に必要なビームエネルギーは若干
大きくなる。しかし、SiNの融点がSiより高いの
で、より均一な単結晶を得ることが可能となる。
さらに、光透過防止膜としてはSi、SiNに限ら
ず、他の半導体膜や絶縁膜を使用することが可能
である。また、溶融再結晶化すべきシリコン層は
非晶質に限らず、多結晶であつてもよく、さらに
シリコン層の代りに他の半導体薄膜を用いること
も可能である。その他、本発明の要旨を逸脱しな
い範囲で、種々変形して実施することができる。 Note that the present invention is not limited to the embodiments described above. For example, the metal film is not limited to tungsten, but is preferably a high melting point metal, and the film thickness can be changed as appropriate. In addition, as the light transmission prevention film, SiN film is used instead of the Si film.
A membrane may also be used. In the case of a SiN film, the ability to prevent blackbody radiation is smaller than that of a Si film, so the beam energy required for melting and recrystallizing the silicon layer is slightly larger. However, since the melting point of SiN is higher than that of Si, it becomes possible to obtain a more uniform single crystal.
Furthermore, the light transmission prevention film is not limited to Si and SiN, but other semiconductor films and insulating films can be used. Further, the silicon layer to be melted and recrystallized is not limited to amorphous, but may be polycrystalline, and it is also possible to use another semiconductor thin film instead of the silicon layer. In addition, various modifications can be made without departing from the gist of the present invention.
第１図は従来方法を説明するための断面図、第
２図ａ〜ｃは本発明の一実施例方法に係わる半導
体薄膜結晶層の製造工程を示す断面図、第３図
ａ，ｂは上記実施例方法の作用を説明するための
模式図である。
２１…シリコン基板（半導体基板）、２２，２
４…SiO2膜、２３…シリコン層（半導体薄膜結
晶層）、２５…タングステン膜（金属膜）、２６…
Si膜（光透過防止膜）。
FIG. 1 is a cross-sectional view for explaining the conventional method, FIGS. 2 a to c are cross-sectional views showing the manufacturing process of a semiconductor thin film crystal layer according to an embodiment of the present invention, and FIGS. 3 a and b are the above-described steps. It is a schematic diagram for explaining the effect of the example method. 21...Silicon substrate (semiconductor substrate), 22,2
4... SiO 2 film, 23... Silicon layer (semiconductor thin film crystal layer), 25... Tungsten film (metal film), 26...
Si film (light transmission prevention film).
Claims (1)
を形成する工程と、上記薄膜上に絶縁膜を介して
金属膜を形成する工程と、上記金属膜上に光の透
過を防止する少なくとも一層の光透過防止膜を形
成する工程と、次いで上記光透過防止膜上から前
記金属膜に電子ビームを入射し前記半導体薄膜を
間接的に昇温して溶融再結晶化する工程とを含む
ことを特徴とする半導体薄膜結晶層の製造方法。 ２ 前記光透過防止膜として、半導体膜を用いた
ことを特徴とする特許請求の範囲第１項記載の半
導体薄膜結晶層の製造方法。 ３ 前記光透過防止膜として、絶縁膜を用いたこ
とを特徴とする特許請求の範囲第１項記載の半導
体薄膜結晶層の製造方法。[Claims] 1. A step of forming a polycrystalline or amorphous semiconductor thin film on an insulator, a step of forming a metal film on the thin film via an insulating film, and a step of forming a polycrystalline or amorphous semiconductor thin film on the insulator, and forming a metal film on the metal film via an insulating film. A step of forming at least one layer of a light transmission prevention film for preventing transmission, and then an electron beam is incident on the metal film from above the light transmission prevention film to indirectly raise the temperature of the semiconductor thin film to melt and recrystallize it. A method for manufacturing a semiconductor thin film crystal layer, comprising the steps of: 2. The method for manufacturing a semiconductor thin film crystal layer according to claim 1, wherein a semiconductor film is used as the light transmission prevention film. 3. The method of manufacturing a semiconductor thin film crystal layer according to claim 1, wherein an insulating film is used as the light transmission prevention film.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP58245064A JPS60140717A (en) | 1983-12-28 | 1983-12-28 | Manufacture of semiconductor thin film crystal layer |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP58245064A JPS60140717A (en) | 1983-12-28 | 1983-12-28 | Manufacture of semiconductor thin film crystal layer |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPS60140717A JPS60140717A (en) | 1985-07-25 |
| JPS6362894B2 true JPS6362894B2 (en) | 1988-12-05 |
Family
ID=17128048
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP58245064A Granted JPS60140717A (en) | 1983-12-28 | 1983-12-28 | Manufacture of semiconductor thin film crystal layer |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS60140717A (en) |
Families Citing this family (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2009127182A (en) * | 2007-11-27 | 2009-06-11 | Noriko Kodama | Salon apron with towel |
-
1983
- 1983-12-28 JP JP58245064A patent/JPS60140717A/en active Granted
Also Published As
| Publication number | Publication date |
|---|---|
| JPS60140717A (en) | 1985-07-25 |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| US3585088A (en) | Methods of producing single crystals on supporting substrates | |
| EP0036137B1 (en) | Method for production of semiconductor devices | |
| US4596604A (en) | Method of manufacturing a multilayer semiconductor device | |
| JPS6246989B2 (en) | ||
| JPS58116764A (en) | Manufacture of semiconductor device | |
| JP2709591B2 (en) | Method for manufacturing recrystallized semiconductor thin film | |
| US5431126A (en) | Method of forming semiconductor crystal and semiconductor device | |
| JPH027415A (en) | Formation of soi thin film | |
| JPS6362894B2 (en) | ||
| JPS635913B2 (en) | ||
| JPS621220A (en) | Method for producing oriented silicon single crystal film with localized defects on an insulating support | |
| JPS5833822A (en) | Preparation of semiconductor substrate | |
| JPS6347256B2 (en) | ||
| JP2692138B2 (en) | Manufacturing method of single crystal thin film | |
| JPH03284831A (en) | Forming method for semiconductor thin-film | |
| JPH0697196A (en) | Semiconductor device and manufacture thereof | |
| JPH0442358B2 (en) | ||
| JPS6315471A (en) | Thin film transistor and its manufacturing method | |
| JPS6020890B2 (en) | semiconductor equipment | |
| JPH0257337B2 (en) | ||
| JPS59198765A (en) | Insulated gate type field effect transistor | |
| JPS60105219A (en) | Manufacture of semiconductor thin film crystal layer | |
| JP2526380B2 (en) | Method for manufacturing multilayer semiconductor substrate | |
| JPS62134922A (en) | Manufacture of semiconductor device | |
| JPS61193423A (en) | Manufacture of semiconductor device |
Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| EXPY | Cancellation because of completion of term |