JPS6365332U - - Google Patents

Description

[Brief explanation of the drawing]

1 to 4 show one embodiment of the audio mute circuit of this invention, FIG. 1 is a block diagram, FIG. 2 is a detailed wiring diagram of a part of the electronic tuner, and FIG.
Figures a and b are timing charts for explaining the formation of the mute signal, Figures 4 a to c are timing charts for explaining the mute operation, Figure 5 is a block diagram of a receiving device equipped with a conventional mute circuit, and Figure 6 is a timing chart for explaining the formation of the mute signal. Figures a to c are timing charts for explaining the mute operation of Figure 5. 2...Electronic tuner, 3...Output terminal, 5...Tuning selection circuit, 6...Low pass filter, Qb...Mute transistor.

Claims (1)

[Claims for Utility Model Registration] A specified tuning period and a specified power-on period provided in a receiving device that performs reception selection by an electronic tuner until the reception channel shifts from the current channel to the next channel. In an audio muting circuit for muting a received audio signal, a pulse train signal for muting is provided that has the shortest or longest pulse width at the beginning and end of the tuning period and the power-on period, and has the longest or shortest pulse width in the middle. a pulse generating means that generates pulses in each of the channel selection period and the power-on period; a low-pass filter that smooths the pulse train signal to form a gently sloped trapezoidal wave-like mute signal; An audio muting circuit comprising muting means for varying the impedance between an output terminal and ground to mute the received audio signal.