JPS6365680A - Tunnel diode type semiconductor device - Google Patents

Abstract

PURPOSE:To increase a transmission probability of electrons and make it possible to increase the transmitted current by forming an impurity level in a forbidden band of semiconductor layer that could be an obstacle in forming quantum well. CONSTITUTION:An n-type GaAs substrate 1, an n-type Al0.3Ga0.7As layer 2 that is doped with Si at 5X10<17>cm<-3>, a layer 3 with high purity GaAs, a layer 4 with high purity Al0.3Ga0.7As, and an n-type GaAs layer 5 are used as the first, second, third, fourth and fifth semiconductor layers according to the order of describing above so as to perform the epitaxial growth. Gold, germanium, and nickel are processed by a deposition process and then are alloyed to form electrodes 6 and 7. A process of the epitaxial growth allows the n-type Al0.3Ga0.7 As layer 2 and the layer 4 with high purity Al0.3Ga0.7As to grow by 50 Angstrom and the layer with high purity GaAs to grow by 45 Angstrom respectively with a process of molecular beam epitaxy. Thus, electrons having an energy corresponding to an impurity energy level can increase each probability of existence and transmission in respective layers.

Description

[Detailed Description of the Invention] [Industrial Application Field] The present invention relates to a tunnel diode type semiconductor device, and in particular is formed of semiconductor layers having different electron affinities or different sums of electron affinities and forbidden band widths. This invention relates to a tunnel diode type semiconductor device using quantum levels.

[Conventional technology]

Tunnel diodes, which use quantum levels formed by semiconductor layers with high electron affinities or semiconductor layers with different electron affinities and forbidden band widths, have attracted increasing attention in recent years because of their ability to obtain large negative resistance, especially at low temperatures. It is something that exists. This type of tunnel diode uses a gallium arsenide (hereinafter referred to as GaAs) layer and a semiconductor layer having a lower electron affinity, such as an aluminum gallium arsenide (hereinafter referred to as ^I GaAs) layer. Operates by controlling voltage.

Now, in such a semiconductor device, for example, electrons are
It passes through the aAs layer and the Al GaAs layer that acts as a barrier, but it is a tunnel current in the kl GaAs layer, and generally speaking, the higher the aluminum composition, the more the GaAs layer and the Al GaAs layer.
The larger the amount of discontinuity in the valence band of the GaAs layer, the more AJ? The thicker the GaAs layer, the lower the probability of transmission.

Therefore, to increase the amount of current that passes through! ! Ga
Although it is necessary to make the As layer thinner to some extent, it must be thinner than a certain level in order to form a quantum level. Therefore, the thickness of the AlGaAs layer is approximately 50 mm.

[Problem that the invention seeks to solve]

In this way, electrons passing through the AeGaAs layer are a tunnel phenomenon, and the energy of the electrons is located in the forbidden band of ^eGaAs.In the kl GaAs layer where there are no impurities, there is no energy level where electrons can exist. Since there are no electrons at this energy level in a steady state, the rate at which electrons pass through this layer is low, and there is a problem in that the amount of current flowing through the diode cannot be increased.

An object of the present invention is to provide a tunnel diode type semiconductor device with a large amount of current.

[Means for solving problems]

In the first tunnel diode type semiconductor device of the present invention, a p-type first semiconductor layer is provided with a second semiconductor layer or a first insulator layer having a smaller electron affinity than the first semiconductor layer, and the second semiconductor layer Alternatively, a third semiconductor layer having a smaller electron affinity is provided on the first insulating layer, and further the third semiconductor layer has a lower electron affinity than the first insulating layer.
A fourth semiconductor layer or a second insulating layer having a smaller electron affinity is provided on the semiconductor layer, and a fourth semiconductor layer or a second insulating layer having a larger electron affinity than the fourth semiconductor layer or the second insulating layer is provided on the fourth semiconductor layer or the second insulating layer. In a tunnel diode type semiconductor device comprising at least one quantum well provided with a fifth semiconductor layer of the type, a predetermined voltage applied between the first semiconductor layer and the fifth semiconductor layer. In the method, an n-type impurity constituting an impurity level matching a quantum level in the quantum well is added to the second semiconductor layer or the first insulator layer and the fourth insulator layer.
It has a structure in which it is included in at least one of the semiconductor layer or the second insulator layer.

In the second tunnel diode type semiconductor device of the present invention, a second semiconductor layer or a first insulating layer having a larger sum of electron affinity and forbidden band width is provided on the p-type first semiconductor layer, Further, a third semiconductor layer having a smaller sum of electron affinity and forbidden band width is provided on the second semiconductor layer or the first insulator layer, and furthermore, a third semiconductor layer with a smaller sum of electron affinity and forbidden band width is provided on the third semiconductor layer. A fourth semiconductor layer or a second insulating layer having a large sum of the electron affinity and the forbidden band width is provided on the fourth semiconductor layer or the second insulating layer. In a tunnel diode type semiconductor device in which a small p-type fifth semiconductor layer is provided to constitute at least one quantum well, the first semiconductor layer and the fifth semiconductor layer
forming an impurity level that matches the quantum level in the quantum well at a predetermined voltage applied between the semiconductor layer and the quantum well.
[Function] At least one of the second semiconductor layer or the first insulator layer and the fourth semiconductor layer or the second insulator layer contains an n (or p) type impurity, and the impurity has an energy level specific to the impurity. is formed in the energy band of the semiconductor layer or insulator layer, and the probability of the existence and transmission of electrons in the layer increases for electrons having energy corresponding to this impurity energy level.

〔Example〕

Next, embodiments of the present invention will be described with reference to the drawings.

FIG. 1 is a sectional view of a diode chip showing the main parts of an embodiment of a first tunnel diode type semiconductor device of the present invention. In this embodiment, an n-type Ga^S substrate 1 is used as a first semiconductor layer.
, an n-type he 0-3caQ,7AS layer 2 doped with Si 5X10''C11 as the second semiconductor layer, a high-purity GaAs layer 3 as the third semiconductor layer, and a high-purity heO,3aa0. 7AS layer 4, an n-type GaAs layer is used as the fifth semiconductor layer and is epitaxially grown. In the figure, the electrode 6.7 is made by depositing and alloying gold, germanium, and nickel. The epitaxial growth method uses molecular beams. N-type Aj by epitaxial method?
0.3Gag, 7A5 layer 2, high purity A10-3GaO-
50 people each for 7AS layer 4, 45 people for high purity GaAs layer
It makes people grow.

FIG. 2 is an energy band phase diagram in a thermal equilibrium state in the depth direction under the electrode 7 in the tunnel diode of this embodiment. Here's the second one. A quantum well structure is formed by the third and fourth semiconductor layers, and a quantum level is formed in the third semiconductor layer. Also, the second semiconductor layer is doped with silicon, which is an n-type impurity, and this n-type
0-3aaO, an impurity level 8 is formed in the energy band of the 7s layer 2.

Next, a voltage of about 0.2 volts is applied with electrode 6 being positive and electrode 7 being negative. FIG. 3 is an energy band phase diagram at this time. By applying a voltage, the valence band of n-type GaAsN3, which is the fifth semiconductor layer, the quantum level 9 of the high-purity GaAs layer 3, which is the third semiconductor layer, and the impurity level 8 in the semiconductor layer are approximately They have the same energy level. In such a state, electrons injected from the n-type GaAs layer 5 pass through the high purity ^eo, 5Gao, 7As layer 4 to form the high purity GaAs layer 3. The quantum level 9 and the impurity level 8 form almost the same level, and reach the nfiGa^S substrate 1 via this level. On the other hand, in the conventional structure, that is, when there is no impurity level in the second semiconductor layer, the cylinder 3
Some of the electrons that reach the semiconductor layer are transmitted, but some are reflected. Therefore, in the case of the present invention, it is not possible to obtain the amount of current at a resonant voltage.

FIG. 4 is a sectional view of a diode chip showing the main part of an embodiment of the second tunnel diode type semiconductor device of the present invention.

In this embodiment, a p-type GaAs substrate 1 is used as the first semiconductor layer.
1. p-type ^e O, 5Gao doped with Cd at 5X1017 cm' as the second semiconductor layer, tAS layer 12, third
A high-purity GaAs layer 13 is used as the semiconductor layer, and a high-purity AI layer is used as the fourth semiconductor layer. An n-type GaAs layer 15 is used as the sAs layer 14 and the fifth semiconductor layer. The electrodes 16 and 17 are made of vapor-deposited alloys of gold, zinc, and dichloromethane.

FIG. 5 is an energy band phase diagram in a thermal equilibrium state in the depth direction under the electrode 17 in this embodiment, and p
Type kl 0-5aaO15 Impurity level 1 in S layer 12
8. A quantum level 19 is formed in the high purity GaAs layer 13.

Similar to the case of electrons, hole tunneling occurs when the quantum level and impurity level become almost the same level due to the applied voltage, and resonant tunneling occurs. This increases the transmission probability, making it possible to obtain a large amount of resonant current.

Note that even if the first insulating layer is used instead of the second semiconductor layer and the second insulating layer is used instead of the fourth semiconductor layer, as long as these insulating layers have a thickness that allows tunneling current to pass through. The above discussion still applies.

〔Effect of the invention〕

As is clear from the above explanation, the present invention increases the probability of electron transmission by forming an impurity level in the forbidden band of the semiconductor layer that serves as a barrier for forming a quantum well, thereby increasing the amount of current transmitted. This has the advantage that the current driving capability of the tunnel diode type semiconductor device can be increased, and the performance of the semiconductor element can be significantly improved compared to the conventional device.

[Brief explanation of drawings]

FIG. 1 is a sectional view showing the main parts of an embodiment of the first tunnel diode type semiconductor device of the present invention, and FIGS. 2 and 3 show the thermal equilibrium state and voltage application state of the embodiment of FIG. 1, respectively. FIG. 4 shows the energy band phase diagram of the second embodiment of the present invention.
FIG. 5 is a cross-sectional view showing an embodiment of the tunnel diode type semiconductor device of FIG. 4, and FIG. 5 is an energy band phase diagram of the embodiment of FIG. 1--- n-type GaAs substrate, 2 ・n-type Aj'o,
5 Gao-p^S layer, 3... High purity GaAs layer, 4...
・・High purity^e 0-3aaQ-7As layer, 5...n
type GaAs layer, 6.7... electrode, 8... impurity level, 9... quantum level, 11... p-type GaAs substrate, 1
2 ・P type A1! ), 5GaO, gAs layer, 13 ・
... High purity GaAs layer, 14 ... High purity ^e o-
5 Gao, 5 Av layer, 15 ・-p-type GaAs layer, 16
．． 17... Electrode, 18... Impurity level, 19...
quantum level. Stay 41! I

Claims (2)

[Claims] (1) A second semiconductor layer or a first insulator layer having a smaller electron affinity is provided on the n-type first semiconductor layer, and a second semiconductor layer or a first insulator layer is further provided on the second semiconductor layer or the first insulator layer. A third semiconductor layer having a lower electron affinity than this is provided, further a fourth semiconductor layer or a second insulating layer having a lower electron affinity is provided on the third semiconductor layer, and further the fourth In the tunnel diode type semiconductor device, an n-type fifth semiconductor layer having a higher electron affinity is provided on the semiconductor layer or the second insulator layer to constitute at least one quantum well. The n-type impurity constituting an impurity level that matches the quantum level in the quantum well at a predetermined voltage applied between the semiconductor layer and the fifth semiconductor layer is in the second semiconductor layer or the first semiconductor layer. and at least one of the fourth semiconductor layer and the second insulator layer. (2) A second semiconductor layer or a first insulator layer having a larger sum of electron affinity and forbidden band width is provided on the p-type first semiconductor layer, and further the second semiconductor layer or the first insulator layer is provided on the p-type first semiconductor layer. A third semiconductor layer having a smaller sum of electron affinity and forbidden band width is provided on the first insulating layer, and a third semiconductor layer having a larger sum of electron affinity and forbidden band width is provided on the third semiconductor layer. A p-type fifth semiconductor layer having a smaller sum of electron affinity and forbidden band is provided on the fourth semiconductor layer or second insulator layer. In a tunnel diode type semiconductor device comprising at least one quantum well provided with A p-type impurity forming an impurity level matching the level is contained in at least one of the second semiconductor layer or the first insulator layer and the fourth semiconductor layer or the second insulator layer. A tunnel diode type semiconductor device characterized by: