JPS636860A - Formation of solder bump for flip chip - Google Patents
Formation of solder bump for flip chipInfo
- Publication number
- JPS636860A JPS636860A JP61149582A JP14958286A JPS636860A JP S636860 A JPS636860 A JP S636860A JP 61149582 A JP61149582 A JP 61149582A JP 14958286 A JP14958286 A JP 14958286A JP S636860 A JPS636860 A JP S636860A
- Authority
- JP
- Japan
- Prior art keywords
- wafer
- plating
- current film
- jig
- bumps
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
Classifications
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W72/00—Interconnections or connectors in packages
- H10W72/01—Manufacture or treatment
- H10W72/012—Manufacture or treatment of bump connectors, dummy bumps or thermal bumps
Landscapes
- Electrodes Of Semiconductors (AREA)
Abstract
Description
【発明の詳細な説明】
（産業上の利用分！？）
この発明はメッキ手段によるフリップチップ用ハンダバ
ンプの形成方法に関するものである。DETAILED DESCRIPTION OF THE INVENTION (Industrial Application!?) The present invention relates to a method for forming solder bumps for flip chips by plating means.
（従来の技術）
従来、この踵のハンダバンプの形成に関してハンダメッ
キにる方法が例えば特開昭５８−９２２２９号公報に開
示されている。(Prior Art) Conventionally, a method using solder plating for forming solder bumps on the heel has been disclosed, for example, in Japanese Patent Laid-Open No. 58-92229.
以下はハンダメッキによるハンダバンプ形成の一例を説
明する。第３ＦｙＪの如（Ｓｉウェハー（１）上に形成
された下地電極（２）を覆って導電物質によるカレント
フィルム（３１が形成され、このカレントフィルム（３
）の上記下地電極（２）と対応する部分がハンダメッキ
する部分（５）となり、この部分のレジスト（４）が除
去されてメッキ時に電流が流れるように露出されている
。An example of forming solder bumps by solder plating will be described below. As in the 3rd FyJ (a current film (31) made of a conductive material is formed covering the base electrode (2) formed on the Si wafer (1), this current film (31) is formed on the base electrode (2) formed on the Si wafer (1).
) corresponds to the base electrode (2) and becomes the part (5) to be solder plated, and the resist (4) in this part is removed and exposed so that current can flow during plating.
次に第４図により、上記カレントフィルム（３）に電流
を流すための治具に対するウェハーの支持例を示す。Ｓ
ｉウェハー（１）は治具（６）に常法の如くセットされ
るが電流を流すためのレジスト（４）の４＃Ｊ趙部分（
８）を図の如く形成し、第５図に拡大して示すように上
記治具（６）の金具（７）をカレントフィルム（３）と
接続させろ。以上の如きウェハーは、第６図に示すよう
に陰極（ｌ横側に８１ウニ八−（１）を接続してメッキ
浴（１１）に浸漬し陽極（９）との間に電流を流すと、
上記カレントフィルム（３）の上記メッキｇ （５１に
メッキが析出し、ハンダメッキバンプｆｌａが形成され
るのである。Next, FIG. 4 shows an example of supporting a wafer with respect to a jig for passing a current through the current film (3). S
The i-wafer (1) is set in the jig (6) in the usual manner, but the 4#J part (4) of the resist (4) for passing current is
8) as shown in the figure, and connect the metal fitting (7) of the jig (6) to the current film (3) as shown in an enlarged view in FIG. As shown in Fig. 6, the wafer as described above is immersed in a plating bath (11) with an 81 sea urchin (1) connected to the side of the cathode (l), and a current is passed between it and the anode (9). ,
The plating is deposited on the plating g (51) of the current film (3), forming the solder plating bump fla.
（発明が解決しようとする問題点）
しかしながら、ハンダバンプ形成に際して上記の如き治
具（６）を用いろと、第８図に説明図として示すように
電気力線（１１の流れが８１ウエハー（１）の端部に囲
り込む部分でそのｖｉ度が高（、即ちその部分でハンダ
メッキの析出量が多くなり、その結果Ｓｉウェハー（１
１の周囲部分でのハンダバンプ（１２ａ）が大きく生長
しＩＣチップ中心部のハンダバンプｆ１．５の大きさに
対して不均一になるという問題点があった（第９図）。(Problems to be Solved by the Invention) However, when forming solder bumps using the jig (6) as described above, as shown in FIG. ) has a high degree of vi (i.e., the amount of solder plating precipitates in that part), and as a result, the Si wafer (1
There was a problem in that the solder bumps (12a) around the IC chip grew large and became non-uniform in size with respect to the solder bumps f1.5 at the center of the IC chip (FIG. 9).
この発明は従来技術におけるかかるバンプの不均一とな
る欠点を解決し、Ｓｉウェハー上に均一な大きさのバン
プを形成することのできるフリップチップ用ハンダバン
プの形成方法を提供するものである。The present invention solves the disadvantage of non-uniform bumps in the prior art and provides a method for forming solder bumps for flip chips that can form bumps of uniform size on a Si wafer.
（問題点を解決するための手段）
この発明は上記問題点を解決するために、ハンダバンプ
形成に際して、上述したＳｉウェハーの周囲に沿って略
リング状にレジストを除去しこの部分でカレントフィル
ムを露出させバンプメタルのメッキを行うようにしたも
のである。(Means for Solving the Problems) In order to solve the above problems, the present invention, when forming solder bumps, removes the resist in a substantially ring shape along the periphery of the Si wafer described above and exposes the current film in this part. This is to plate the bump metal.
（作 用）
この発明おいては以上のように、ハンダバンプのメッキ
による形成に際して、Ｓｌウェハーの周囲に沿って略リ
ング状にカレントフィルムを露出させろことにより、上
述の囲り込む電気力線の密度増によるメッキをこの部分
に析出させ不均一な大きさのバンプ形成を回避するよう
にしたものである。(Function) As described above, in this invention, when forming solder bumps by plating, by exposing the current film in a substantially ring shape along the periphery of the Sl wafer, the density of the electric lines of force to be enclosed is reduced. This is to prevent the formation of unevenly sized bumps by depositing the plating on these parts.
（実 施 例）
第１図にこの発明の一実施例によるハンダバンプ形成方
法を示す。上記と同様に治具（６）によりＳ１ウエハー
１１）を支持しメッキを行う。この場合Ｓｉウェハ−（
１）の周囲部においてレジストを略環状に全て除去し、
カレントフィルム（３）の露出部（３ａ）を設は治具（
６）の金具（７）をカレントフィルム（３）と接続させ
る。このようなウェハーの支持状態において以下常法の
如くＳｌウェハーへのメッキ作業を行うことにより、ウ
ェハー（１）の周囲部分に囲り込んでくる上述した電気
力線に起因するメッキを上記露出部（３ａ）上に析出さ
せ得ろ。この結果、第２図に示すようにＳｉウェハー（
１）上には概ね均一な大きさのバンプ（１７５を形成す
ることができる。(Embodiment) FIG. 1 shows a solder bump forming method according to an embodiment of the present invention. Similarly to the above, the S1 wafer 11) is supported by the jig (6) and plated. In this case, the Si wafer (
1) Remove all the resist in a substantially circular shape around the area,
The exposed part (3a) of the current film (3) is set using a jig (
Connect the metal fitting (7) of 6) to the current film (3). In this supported state of the wafer, plating is performed on the Sl wafer in the usual manner, thereby removing the plating caused by the electric lines of force surrounding the wafer (1) from the exposed area. (3a) may be precipitated on top. As a result, the Si wafer (
1) Bumps (175) of approximately uniform size can be formed on the surface.
（発明の効果）
以上説明したようにこの発明によれば、Ｓｉウェハーの
周囲にカレン（・フィルムを環状に露出させたことによ
り、該ウェハー周辺でのメッキの囲り込みを防止するこ
とができ、これによりウェハー全面に均一な大きさのハ
ンダバンプの形成を可能とし著しく製品歩留りを向上さ
せ得ろ。(Effects of the Invention) As explained above, according to the present invention, by exposing the Karen film in a ring shape around the Si wafer, it is possible to prevent the plating from surrounding the wafer. This makes it possible to form solder bumps of uniform size over the entire surface of the wafer, thereby significantly improving product yield.
第１図はこの発明におけるハンダバンプ形成方法を実施
するためのバンプ形成前のウェハー支持平面図、第２図
は同バ〉ブ形成後のウェハー平面図、第３図は従来のハ
ンダバンブ形成方法におけろバンプ形成的のウェハー断
面図、第４図は同治具への支持平面部、第５図は同要部
の断面図、第６図は同メッキ時の説明図、第７図は同メ
ッキ後のウェハーの断面図、第８図は同メッキ時の電気
力線の流れ説明図、第９図は同ウェハーの不均一ハンダ
バンブ生長の説明図である。
（１）−Ｓ ｉウェハ−１（３）・カレントフィルム、
（３ａ）・・・露出部、（６）・・・治具、（７）・金
具、（＋１． （１２ａ）・・・ハンダバンプ。
特許出願人 沖電気工業株式会社
妊使１／ｌ ｒＹンプ形族泊めδシ久バーのｒ口冶刀第
３図
ｓレフニハーｉ洛具り＝支袴しな工■肥
第 ５ 因業４図
ＳＩ／フヱハー０メ・ンキ言乏！！月原り第６図
バンブ形ルｌ友のふバｌバー／）オ午！Ｚ第７図FIG. 1 is a plan view of the wafer support before forming bumps to carry out the solder bump forming method according to the present invention, FIG. 2 is a plan view of the wafer after forming the same bumps, and FIG. A cross-sectional view of a wafer for forming Kero bumps, Figure 4 is a flat surface supporting the same jig, Figure 5 is a cross-sectional view of the main parts, Figure 6 is an explanatory diagram during plating, and Figure 7 is after plating. FIG. 8 is an explanatory diagram of the flow of electric lines of force during plating, and FIG. 9 is an explanatory diagram of uneven solder bump growth on the wafer. (1)-Si wafer-1 (3) current film,
(3a)...Exposed part, (6)...Jig, (7)...Metal fittings, (+1. (12a)...Solder bump. Patent applicant: Oki Electric Industry Co., Ltd. Figure 3 of Shazoku Tomarime δ Shikubar's Rakujito Figure 3 s Refniha i Rakuguri = Shihakama Shinako ■ Hi
5th Cause and Work 4 SI/Fueha 0me Nki is poor! ! Tsukihara Ri Figure 6 Bamboo shape le l friend's fubar l bar/) ogo! Z figure 7
Claims (1)
を塗布しない露出部分に電気メッキ法によりハンダバン
プを形成する方法において、上記Ｓｉウェハーの周囲に
略環状にカレントフィルムの露出部を設けたバンプメタ
ルをメッキすることを特徴とするフリップチップ用ハン
ダバンプ形成方法。In a method of forming solder bumps by electroplating on exposed portions of a current film formed on a Si wafer where no resist is applied, a bump metal is plated around the Si wafer in which an exposed portion of the current film is provided in a substantially annular shape. A method for forming solder bumps for flip chips.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP61149582A JPS636860A (en) | 1986-06-27 | 1986-06-27 | Formation of solder bump for flip chip |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP61149582A JPS636860A (en) | 1986-06-27 | 1986-06-27 | Formation of solder bump for flip chip |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPS636860A true JPS636860A (en) | 1988-01-12 |
| JPH0580141B2 JPH0580141B2 (en) | 1993-11-08 |
Family
ID=15478348
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP61149582A Granted JPS636860A (en) | 1986-06-27 | 1986-06-27 | Formation of solder bump for flip chip |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS636860A (en) |
Cited By (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPH049018A (en) * | 1990-04-26 | 1992-01-13 | Asahi Optical Co Ltd | Real image finder and camera provided with real image finder |
| US5914274A (en) * | 1996-03-21 | 1999-06-22 | Matsushita Electric Industrial Co., Ltd. | Substrate on which bumps are formed and method of forming the same |
| JP2006066437A (en) * | 2004-08-24 | 2006-03-09 | Oki Electric Ind Co Ltd | Manufacturing method of semiconductor device and manufacturing apparatus used in the manufacturing method |
| JP2007048802A (en) * | 2005-08-08 | 2007-02-22 | Tdk Corp | Wiring board |
Citations (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS5817638A (en) * | 1981-07-24 | 1983-02-01 | Hitachi Ltd | Bump forming device |
-
1986
- 1986-06-27 JP JP61149582A patent/JPS636860A/en active Granted
Patent Citations (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS5817638A (en) * | 1981-07-24 | 1983-02-01 | Hitachi Ltd | Bump forming device |
Cited By (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPH049018A (en) * | 1990-04-26 | 1992-01-13 | Asahi Optical Co Ltd | Real image finder and camera provided with real image finder |
| US5914274A (en) * | 1996-03-21 | 1999-06-22 | Matsushita Electric Industrial Co., Ltd. | Substrate on which bumps are formed and method of forming the same |
| US6042953A (en) * | 1996-03-21 | 2000-03-28 | Matsushita Electric Industrial Co., Ltd. | Substrate on which bumps are formed and method of forming the same |
| JP2006066437A (en) * | 2004-08-24 | 2006-03-09 | Oki Electric Ind Co Ltd | Manufacturing method of semiconductor device and manufacturing apparatus used in the manufacturing method |
| JP2007048802A (en) * | 2005-08-08 | 2007-02-22 | Tdk Corp | Wiring board |
Also Published As
| Publication number | Publication date |
|---|---|
| JPH0580141B2 (en) | 1993-11-08 |
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Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| EXPY | Cancellation because of completion of term |