JPS6384957U - - Google Patents
Info
- Publication number
- JPS6384957U JPS6384957U JP1986069321U JP6932186U JPS6384957U JP S6384957 U JPS6384957 U JP S6384957U JP 1986069321 U JP1986069321 U JP 1986069321U JP 6932186 U JP6932186 U JP 6932186U JP S6384957 U JPS6384957 U JP S6384957U
- Authority
- JP
- Japan
- Prior art keywords
- substrate
- electrodes
- chip carrier
- view
- showing
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Classifications
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W90/00—Package configurations
- H10W90/701—Package configurations characterised by the relative positions of pads or connectors relative to package parts
- H10W90/721—Package configurations characterised by the relative positions of pads or connectors relative to package parts of bump connectors
- H10W90/724—Package configurations characterised by the relative positions of pads or connectors relative to package parts of bump connectors between a chip and a stacked insulating package substrate, interposer or RDL
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W90/00—Package configurations
- H10W90/701—Package configurations characterised by the relative positions of pads or connectors relative to package parts
- H10W90/751—Package configurations characterised by the relative positions of pads or connectors relative to package parts of bond wires
- H10W90/754—Package configurations characterised by the relative positions of pads or connectors relative to package parts of bond wires between a chip and a stacked insulating package substrate, interposer or RDL
Landscapes
- Wire Bonding (AREA)
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP1986069321U JPS6384957U (2) | 1986-05-08 | 1986-05-08 |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP1986069321U JPS6384957U (2) | 1986-05-08 | 1986-05-08 |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPS6384957U true JPS6384957U (2) | 1988-06-03 |
Family
ID=30909949
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP1986069321U Pending JPS6384957U (2) | 1986-05-08 | 1986-05-08 |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS6384957U (2) |
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1986
- 1986-05-08 JP JP1986069321U patent/JPS6384957U/ja active Pending