JPS6392121A - ultrasonic delay line - Google Patents

ultrasonic delay line

Info

Publication number
JPS6392121A
JPS6392121A JP61238361A JP23836186A JPS6392121A JP S6392121 A JPS6392121 A JP S6392121A JP 61238361 A JP61238361 A JP 61238361A JP 23836186 A JP23836186 A JP 23836186A JP S6392121 A JPS6392121 A JP S6392121A
Authority
JP
Japan
Prior art keywords
delay line
ultrasonic delay
present
medium
piezoelectric element
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP61238361A
Other languages
Japanese (ja)
Inventor
Daishiro Hayakawa
早川 第四郎
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Panasonic Holdings Corp
Original Assignee
Matsushita Electric Industrial Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Matsushita Electric Industrial Co Ltd filed Critical Matsushita Electric Industrial Co Ltd
Priority to JP61238361A priority Critical patent/JPS6392121A/en
Publication of JPS6392121A publication Critical patent/JPS6392121A/en
Pending legal-status Critical Current

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  • Piezo-Electric Or Mechanical Vibrators, Or Delay Or Filter Circuits (AREA)

Abstract

(57)【要約】本公報は電子出願前の出願データであるた
め要約のデータは記録されません。
(57) [Abstract] This bulletin contains application data before electronic filing, so abstract data is not recorded.

Description

【発明の詳細な説明】 産業上の利用分野 本発明はプリント基板に実装が容易で、かつ構造の簡単
な超音波遅延線に関するものである。
DETAILED DESCRIPTION OF THE INVENTION Field of Industrial Application The present invention relates to an ultrasonic delay line that is easy to mount on a printed circuit board and has a simple structure.

従来の技術 従来、この種の超音波遅延線は、第4図、第6図に示す
ような構成であった。第6図、第6図においては、1は
ガラス遅延媒体であり、その端面に取付けられた圧電素
子2への信号の入出力は、リードワイヤ3を介して端子
ビン4で行う。尚、5はケースである。この第5図に示
す超音波遅延線を第6図のようにプリント基板6上に取
付ける。
2. Description of the Related Art Conventionally, this type of ultrasonic delay line has been constructed as shown in FIGS. 4 and 6. In FIGS. 6 and 6, reference numeral 1 denotes a glass delay medium, and input/output of signals to a piezoelectric element 2 attached to an end face of the medium is performed via a lead wire 3 and a terminal pin 4. Note that 5 is a case. The ultrasonic delay line shown in FIG. 5 is mounted on the printed circuit board 6 as shown in FIG.

4407+−”H+−1+++’+1−、++P」r−
−^+−−ダ付したものである。
4407+-"H+-1+++'+1-, ++P"r-
−^+−− is added.

発明が解決しようとする問題点 このような構成では、リードワイヤ3を取付けるだめの
工数を要し生産性の上で問題があった。
Problems to be Solved by the Invention In such a configuration, it takes many man-hours to attach the lead wire 3, which poses a problem in terms of productivity.

本発明はこのような問題点を解決するもので、工業的に
安価でかつ、チップ実装の容易な超音波遅延線を提供す
ることを目的とするものである。
The present invention solves these problems and aims to provide an ultrasonic delay line that is industrially inexpensive and easy to mount on a chip.

問題点を解決するだめの手段 この問題点を解決するために本発明は、ガラス遅延媒体
上に設けられた圧電素子上の電極がプリント基板上形成
された電極上に位置するよう配置するものである。
Means for Solving the Problem In order to solve this problem, the present invention arranges the electrodes on the piezoelectric element provided on the glass delay medium to be located on the electrodes formed on the printed circuit board. be.

作用 この構成により、超音波遅延線は工業的に安価で、チッ
プ実装が可能となる。
Effect: This configuration allows the ultrasonic delay line to be industrially inexpensive and to be mounted on a chip.

実施例 第1図は本発明の一実施例による超音波遅延線を示す図
であり、第1図において、7はガラス遅延媒体、8は圧
電素子、9は電極である。第2図は太登日ロf上ス定跣
佑1であh−笛りr’;W IF k−lxイプリント
基板10上に半田11により取付けられている。
Embodiment FIG. 1 is a diagram showing an ultrasonic delay line according to an embodiment of the present invention. In FIG. 1, 7 is a glass delay medium, 8 is a piezoelectric element, and 9 is an electrode. FIG. 2 shows a rotor board 1 which is mounted on a printed circuit board 10 with solder 11.

第3図は本発明の池の実施例による超音波遅延線を示す
図であり、第3図において、12はガラス遅延媒体、1
3は圧電素子、14は電極である。
FIG. 3 is a diagram showing an ultrasonic delay line according to an embodiment of the present invention, in which 12 is a glass delay medium;
3 is a piezoelectric element, and 14 is an electrode.

このように電極はガラス遅延媒体12の同一側面に設け
る必要はない。
In this way, the electrodes do not need to be provided on the same side of the glass retardation medium 12.

発明の効果 以上のように本発明によれば、リードワイヤの取付けが
なく安価で、チップ実装が容易という効果が得られる。
Effects of the Invention As described above, according to the present invention, there is no need to attach lead wires, the cost is low, and chip mounting is easy.

【図面の簡単な説明】[Brief explanation of the drawing]

第1図は本発明の一実施例による超音波遅延線の平面図
、第2図は本発明による実装例を示す平面図、第3図は
本発明の池の実施例を示す平面図、第4図は従来の超音
波遅延線の内観を示す平面図、第5図は従来の超音波遅
延線の実装例を示す斜視図である。 7.12・・・・・・ガラス遅延媒体、8,13・・・
・・・圧電素子、9・14・・・・・・電極、16・・
・・・・ケース。 7−−−カーラスλ)聾部本ト ?−−−冑通玄 ? 第2図 第3図 @4図 3′
FIG. 1 is a plan view of an ultrasonic delay line according to an embodiment of the present invention, FIG. 2 is a plan view showing an implementation example of the present invention, and FIG. FIG. 4 is a plan view showing the interior of a conventional ultrasonic delay line, and FIG. 5 is a perspective view showing an example of mounting the conventional ultrasonic delay line. 7.12...Glass delay medium, 8,13...
...Piezoelectric element, 9, 14... Electrode, 16...
····Case. 7---Karas λ) Deaf section Honto? ---Gen Tsutsu? Figure 2 Figure 3 @ 4 Figure 3'

Claims (1)

【特許請求の範囲】[Claims]  ガラス遅延媒体に設けられ圧電素子上の電極がプリン
ト基板の電極上に位置するよう配置されてなる超音波遅
延線。
An ultrasonic delay line provided in a glass delay medium and arranged so that the electrodes on the piezoelectric element are located on the electrodes on the printed circuit board.
JP61238361A 1986-10-07 1986-10-07 ultrasonic delay line Pending JPS6392121A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP61238361A JPS6392121A (en) 1986-10-07 1986-10-07 ultrasonic delay line

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP61238361A JPS6392121A (en) 1986-10-07 1986-10-07 ultrasonic delay line

Publications (1)

Publication Number Publication Date
JPS6392121A true JPS6392121A (en) 1988-04-22

Family

ID=17029044

Family Applications (1)

Application Number Title Priority Date Filing Date
JP61238361A Pending JPS6392121A (en) 1986-10-07 1986-10-07 ultrasonic delay line

Country Status (1)

Country Link
JP (1) JPS6392121A (en)

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