JPS6410496A - Semiconductor storage device - Google Patents
Semiconductor storage deviceInfo
- Publication number
- JPS6410496A JPS6410496A JP62166324A JP16632487A JPS6410496A JP S6410496 A JPS6410496 A JP S6410496A JP 62166324 A JP62166324 A JP 62166324A JP 16632487 A JP16632487 A JP 16632487A JP S6410496 A JPS6410496 A JP S6410496A
- Authority
- JP
- Japan
- Prior art keywords
- bit
- test
- constitution
- current consumption
- arrays
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 239000004065 semiconductor Substances 0.000 title abstract 2
- 238000003491 array Methods 0.000 abstract 3
Landscapes
- Dram (AREA)
- Tests Of Electronic Circuits (AREA)
- Testing Or Measuring Of Semiconductors Or The Like (AREA)
- Semiconductor Memories (AREA)
- For Increasing The Reliability Of Semiconductor Memories (AREA)
Abstract
PURPOSE:To reduce current consumption and to conduct an interference test by operating m bits on a separate memory cell plate at the same time in a semiconductor storage device of n-wordX1-bit constitution to conduct n/m- wordXm-bit test (where n is a multiple of m). CONSTITUTION:Any of data amplifiers 4-7 is selected via an address buffer circuit 29 at the normal operation to operate memory cell arrays 8-11 corresponding to n=4-wordX1-bit constitution. Thus, the current consumption by undesired amplifiers 4-7 is not required and the current consumption is reduced. At the time of test mode, on the other hand, the m=1 bit of separate arrays 8-11 is operated at the same time and the test of n/m=4-wordXm=1-bit constitution is conducted and the interference test among the arrays 8-11 is conducted.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP62166324A JPS6410496A (en) | 1987-07-02 | 1987-07-02 | Semiconductor storage device |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP62166324A JPS6410496A (en) | 1987-07-02 | 1987-07-02 | Semiconductor storage device |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPS6410496A true JPS6410496A (en) | 1989-01-13 |
Family
ID=15829246
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP62166324A Pending JPS6410496A (en) | 1987-07-02 | 1987-07-02 | Semiconductor storage device |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS6410496A (en) |
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| KR100487634B1 (en) * | 1997-12-30 | 2005-08-04 | 주식회사 하이닉스반도체 | Block Control Circuit of Semiconductor Memory Device |
| JP2008198297A (en) * | 2007-02-14 | 2008-08-28 | System Fabrication Technologies Inc | Semiconductor memory device |
Citations (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS53120234A (en) * | 1977-03-30 | 1978-10-20 | Toshiba Corp | Semiconductor memory |
| JPS61204900A (en) * | 1985-03-07 | 1986-09-10 | Mitsubishi Electric Corp | semiconductor storage device |
| JPS6258492A (en) * | 1985-09-09 | 1987-03-14 | Toshiba Corp | Semiconductor memory device |
-
1987
- 1987-07-02 JP JP62166324A patent/JPS6410496A/en active Pending
Patent Citations (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS53120234A (en) * | 1977-03-30 | 1978-10-20 | Toshiba Corp | Semiconductor memory |
| JPS61204900A (en) * | 1985-03-07 | 1986-09-10 | Mitsubishi Electric Corp | semiconductor storage device |
| JPS6258492A (en) * | 1985-09-09 | 1987-03-14 | Toshiba Corp | Semiconductor memory device |
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| KR100487634B1 (en) * | 1997-12-30 | 2005-08-04 | 주식회사 하이닉스반도체 | Block Control Circuit of Semiconductor Memory Device |
| JP2008198297A (en) * | 2007-02-14 | 2008-08-28 | System Fabrication Technologies Inc | Semiconductor memory device |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| EP0385516A3 (en) | Memory | |
| TW200629295A (en) | Memory bit line segment isolation | |
| TW324823B (en) | Cross-coupled bitline segments for generalized data propagation | |
| EP0264893A3 (en) | Semiconductor memory | |
| TW279218B (en) | Low pin count-wide memory devices and systems and methods using the same | |
| HK2188A (en) | Semiconductor memory device | |
| JPS563499A (en) | Semiconductor memory device | |
| TW375706B (en) | Programmable memory access | |
| KR890001091A (en) | Static RAM Circuit | |
| EP0376245A3 (en) | Semiconductors memory device provided with an improved redundant decoder | |
| TW363188B (en) | Semiconductor memory device | |
| EP0496391A3 (en) | Semiconductor memory device | |
| JPS5661082A (en) | Two level memory integrated circuit | |
| EP0553788A3 (en) | Semiconductor memory device incorporating redundancy memory cells having parallel test function | |
| TW353180B (en) | A method and apparatus for bit cell ground choking for improved memory write margin | |
| JPS6410496A (en) | Semiconductor storage device | |
| TW332355B (en) | Semiconductor device having a latch circuit for latching externally input data | |
| TW238387B (en) | Decoding circuit for semiconductor memory device and its process | |
| EP0788107A3 (en) | Semiconductor memory device | |
| JPS5674888A (en) | Random access memory | |
| TW330293B (en) | Memory chip architecture and packaging method with increased production yield | |
| JPS57127997A (en) | Semiconductor integrated storage device | |
| JPS5710846A (en) | Information processing equipment | |
| JPS56114197A (en) | Semiconductor memory device | |
| JPS6482392A (en) | Semiconductor memory device |