JPS6410670A - Manufacture of bipolar transistor - Google Patents
Manufacture of bipolar transistorInfo
- Publication number
- JPS6410670A JPS6410670A JP62166533A JP16653387A JPS6410670A JP S6410670 A JPS6410670 A JP S6410670A JP 62166533 A JP62166533 A JP 62166533A JP 16653387 A JP16653387 A JP 16653387A JP S6410670 A JPS6410670 A JP S6410670A
- Authority
- JP
- Japan
- Prior art keywords
- nitride film
- external diffusion
- diffusion preventing
- region
- impurity
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
Landscapes
- Bipolar Transistors (AREA)
Abstract
PURPOSE:To prevent effectively the impurity diffusion of a semiconductor surface, by arranging an external diffusion preventing nitride film on an oxide film, and eliminating the external diffusion preventing nitride film at least before the ion implantation for emitter region formation. CONSTITUTION:Via an oxide film 4 and an external diffusion preventing nitride film 5, phosphorus and boron are implanted in order in an N-type epitaxial layer 3. On account of thermal diffusion, the respective regions in which impurity is introduced by ion implantation are activated, and an N<+> type collector lead-out region 9 and an element isolation region 8 are formed. As an external diffusion preventing nitride film 5 to prevent external diffusion is stacked on an oxide film 4, impurity is prevented from being introduced into the surface of the N-type epitaxial layer 3, and the characteristics are stabilized. Then the external diffusion preventing nitride film 5 is eliminated. Thereby, the ion implantation for forming a base region 10 and a graft base region 11 or an emitter region is enabled without changing a usual process.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP62166533A JP2576513B2 (en) | 1987-07-03 | 1987-07-03 | Method for manufacturing bipolar transistor |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP62166533A JP2576513B2 (en) | 1987-07-03 | 1987-07-03 | Method for manufacturing bipolar transistor |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPS6410670A true JPS6410670A (en) | 1989-01-13 |
| JP2576513B2 JP2576513B2 (en) | 1997-01-29 |
Family
ID=15833057
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP62166533A Expired - Lifetime JP2576513B2 (en) | 1987-07-03 | 1987-07-03 | Method for manufacturing bipolar transistor |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JP2576513B2 (en) |
Citations (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS5345974A (en) * | 1976-10-07 | 1978-04-25 | Nec Corp | Manufacture of semiconductor integrated circuit device |
| JPS6038871A (en) * | 1983-08-12 | 1985-02-28 | Hitachi Ltd | Manufacture of bipolar type semiconductor device |
-
1987
- 1987-07-03 JP JP62166533A patent/JP2576513B2/en not_active Expired - Lifetime
Patent Citations (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS5345974A (en) * | 1976-10-07 | 1978-04-25 | Nec Corp | Manufacture of semiconductor integrated circuit device |
| JPS6038871A (en) * | 1983-08-12 | 1985-02-28 | Hitachi Ltd | Manufacture of bipolar type semiconductor device |
Also Published As
| Publication number | Publication date |
|---|---|
| JP2576513B2 (en) | 1997-01-29 |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| US3962717A (en) | Oxide isolated integrated injection logic with selective guard ring | |
| GB1270170A (en) | Improvements relating to transistors | |
| GB1498531A (en) | Semiconductor integrated injection logic cell | |
| JPS5586151A (en) | Manufacture of semiconductor integrated circuit | |
| US4255209A (en) | Process of fabricating an improved I2 L integrated circuit utilizing diffusion and epitaxial deposition | |
| US4404048A (en) | Semiconductor device manufacture | |
| US5065214A (en) | Integrated circuit with complementary junction-isolated bipolar transistors | |
| JPS57134967A (en) | Manufacture of semiconductor device | |
| KR100309641B1 (en) | Bismos memory cell manufacturing method | |
| EP0296771A2 (en) | Semiconductor device with a buried layer, and method of manufacture | |
| JPH01243582A (en) | Semiconductor device and its manufacture | |
| KR0138310B1 (en) | Bipolat transistor fabrication method | |
| JPS6482668A (en) | Manufacture of bipolar transistor | |
| JPH0376591B2 (en) | ||
| JP2506129B2 (en) | Method for manufacturing semiconductor device | |
| JPS5676564A (en) | Semiconductor device and manufacture thereof | |
| JP2943280B2 (en) | Method for manufacturing semiconductor device | |
| JPS60105265A (en) | Manufacture of complementary type semiconductor device | |
| JPS639667B2 (en) | ||
| JPH021937A (en) | Semiconductor bipolar transistor having base and emitter structures in a trench and its manufacturing method | |
| JPS5586152A (en) | Manufacture of semiconductor device | |
| JPS57128954A (en) | Iil semiconductor device | |
| JPS6466962A (en) | Manufacture of semiconductor device | |
| JPH0319708B2 (en) | ||
| JPH0638476B2 (en) | Semiconductor device |
Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| EXPY | Cancellation because of completion of term | ||
| FPAY | Renewal fee payment (event date is renewal date of database) |
Free format text: PAYMENT UNTIL: 20071107 Year of fee payment: 11 |