JPS6411062U - - Google Patents
Info
- Publication number
- JPS6411062U JPS6411062U JP10556487U JP10556487U JPS6411062U JP S6411062 U JPS6411062 U JP S6411062U JP 10556487 U JP10556487 U JP 10556487U JP 10556487 U JP10556487 U JP 10556487U JP S6411062 U JPS6411062 U JP S6411062U
- Authority
- JP
- Japan
- Prior art keywords
- signal
- transistor
- output
- video signal
- composite video
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
- 238000000926 separation method Methods 0.000 claims description 4
- 230000003321 amplification Effects 0.000 claims description 3
- 238000003199 nucleic acid amplification method Methods 0.000 claims description 3
- 230000001360 synchronised effect Effects 0.000 claims 4
- 239000002131 composite material Substances 0.000 claims 3
- 238000010586 diagram Methods 0.000 description 3
Landscapes
- Synchronizing For Television (AREA)
Description
第１図は従来の映像信号処理回路の回路図、第
２図は同要部波形図である。第３図は本考案の一
実施例における映像信号処理回路の回路図である
。
１……時定数回路、２，７……映像信号処理用
のＩＣ、４……トラツプ回路、６……直流バイア
ス回路、Ｔ２……同期分離用トランジスタ、Ｔ４
……反転増巾トランジスタ。
FIG. 1 is a circuit diagram of a conventional video signal processing circuit, and FIG. 2 is a waveform diagram of the main part thereof. FIG. 3 is a circuit diagram of a video signal processing circuit in one embodiment of the present invention. 1... Time constant circuit, 2, 7... IC for video signal processing, 4... Trap circuit, 6... DC bias circuit, T 2 ... Transistor for synchronization separation, T 4
...Inverting amplification transistor.
Claims (1)
から同期信号が出力される同期分離トランジスタ
と、この同期分離トランジスタのベース電極を直
流バイアスする手段と、前記複合映像信号からカ
ラーサブキヤリヤ成分を除去した信号が印加され
反転増巾出力が出力される反転増巾トランジスタ
と、この反転増巾出力が入力される映像信号処理
回路とを備える集積回路を有するテレビジヨン受
像機において、前記集積回路に、前記複合映像信
号からカラーサブキヤリヤ成分を除去した信号を
入力する入力端子を設け、この入力端子に前記同
期分離トランジスタ及び前記反転増巾トランジス
タを接続し、前記反転増巾トランジスタには前記
バイアス手段により直流バイアスされた前記信号
が供給されることを特徴とするテレビジヨン受像
機。 a synchronous separation transistor to which a composite video signal is applied to an input electrode and a synchronous signal is output from an output electrode; means for applying a DC bias to a base electrode of the synchronous separation transistor; and a color subcarrier component is removed from the composite video signal. In a television receiver having an integrated circuit comprising an inverting amplifying transistor to which a signal is applied and an inverted amplified output is output, and a video signal processing circuit to which the inverted amplified output is input, the integrated circuit includes: An input terminal for inputting a signal obtained by removing color subcarrier components from the composite video signal is provided, the synchronous separation transistor and the inverting amplification transistor are connected to this input terminal, and the inverting amplification transistor is connected to the biasing means. A television receiver, characterized in that said signal is supplied with a DC bias.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP10556487U JPH0528848Y2 (en) | 1987-07-09 | 1987-07-09 |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP10556487U JPH0528848Y2 (en) | 1987-07-09 | 1987-07-09 |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPS6411062U true JPS6411062U (en) | 1989-01-20 |
| JPH0528848Y2 JPH0528848Y2 (en) | 1993-07-23 |
Family
ID=31338292
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP10556487U Expired - Lifetime JPH0528848Y2 (en) | 1987-07-09 | 1987-07-09 |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPH0528848Y2 (en) |
-
1987
- 1987-07-09 JP JP10556487U patent/JPH0528848Y2/ja not_active Expired - Lifetime
Also Published As
| Publication number | Publication date |
|---|---|
| JPH0528848Y2 (en) | 1993-07-23 |
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