JPS641156A - Sv voice compressing and expanding circuit - Google Patents

Sv voice compressing and expanding circuit

Info

Publication number
JPS641156A
JPS641156A JP62155528A JP15552887A JPS641156A JP S641156 A JPS641156 A JP S641156A JP 62155528 A JP62155528 A JP 62155528A JP 15552887 A JP15552887 A JP 15552887A JP S641156 A JPS641156 A JP S641156A
Authority
JP
Japan
Prior art keywords
parallel
bit
bit data
serial
data
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP62155528A
Other languages
Japanese (ja)
Other versions
JPH011156A (en
Inventor
Hiroyuki Horii
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Canon Inc
Original Assignee
Canon Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Canon Inc filed Critical Canon Inc
Priority to JP62-155528A priority Critical patent/JPH011156A/en
Priority claimed from JP62-155528A external-priority patent/JPH011156A/en
Publication of JPS641156A publication Critical patent/JPS641156A/en
Publication of JPH011156A publication Critical patent/JPH011156A/en
Pending legal-status Critical Current

Links

Landscapes

  • Signal Processing Not Specific To The Method Of Recording And Reproducing (AREA)
  • Television Signal Processing For Recording (AREA)

Abstract

PURPOSE: To realize size reduction, space saving, and low power consumption by using one memory of 4-bit constitution and arranging a parallel/serial and a serial/parallel converters in front of and behind the memory.
CONSTITUTION: A memory part is so constituted by providing a dual port memory 3 with 1-sector capacity that 8-bit data are converted into two 4-bit data from parallel to serial and written in the memory of 4-bit, 1-word constitution and the data are read out as 8-bit data by series/parallel conversion. Namely, a converter 1 has 8-bit constitution and converts the 8-bit data into two 4-bit data from parallel to serial and a latch circuit 4 converts the 4-bit data into the 8-bit data from serial to parallel. Consequently, compression and expansion are easily performed so that audio data and video data are made access at the same time.
COPYRIGHT: (C)1989,JPO&Japio
JP62-155528A 1987-06-24 SV audio compression/expansion circuit Pending JPH011156A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP62-155528A JPH011156A (en) 1987-06-24 SV audio compression/expansion circuit

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP62-155528A JPH011156A (en) 1987-06-24 SV audio compression/expansion circuit

Publications (2)

Publication Number Publication Date
JPS641156A true JPS641156A (en) 1989-01-05
JPH011156A JPH011156A (en) 1989-01-05

Family

ID=

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