JPS6414937A - Prober - Google Patents

Prober

Info

Publication number
JPS6414937A
JPS6414937A JP17161487A JP17161487A JPS6414937A JP S6414937 A JPS6414937 A JP S6414937A JP 17161487 A JP17161487 A JP 17161487A JP 17161487 A JP17161487 A JP 17161487A JP S6414937 A JPS6414937 A JP S6414937A
Authority
JP
Japan
Prior art keywords
probes
pads
deep
brought
probe board
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP17161487A
Other languages
Japanese (ja)
Inventor
Junichi Tsuchimoto
Naoto Okazaki
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Sumitomo Electric Industries Ltd
Original Assignee
Sumitomo Electric Industries Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Sumitomo Electric Industries Ltd filed Critical Sumitomo Electric Industries Ltd
Priority to JP17161487A priority Critical patent/JPS6414937A/en
Publication of JPS6414937A publication Critical patent/JPS6414937A/en
Pending legal-status Critical Current

Links

Landscapes

  • Testing Of Individual Semiconductor Devices (AREA)
  • Measuring Leads Or Probes (AREA)
  • Testing Or Measuring Of Semiconductors Or The Like (AREA)

Abstract

PURPOSE:To expand applicability and to decrease replacing frequency of probe cards, by providing deep probes so as to correspond to each pad of a semiconductor element, which has different arrangement of the pads and lifting the probes, which do not correspond to the pads of the semiconductor element to be inspected. CONSTITUTION:In a probe board 1, a copper foil is etched end a specified wiring pattern is formed. Many deep probes 3 and 4 are attached to the probe board 1. The deep probes 3 and 4 are arranged around a positioning peep hole 2 in the probe board 1. The base parts of the probes are connected to the wiring layer of the probe board 1. The tips of the probes are bent downward and brought into contact with pads 11 of a semiconductor element 10 of a semiconductor wafer. Thus, inspection is performed. A grounding rod 7, which is provided at the upper parts of the deep probes 3 and 6 is formed in an annular shape so that all the deep probes 3 and 4 can be brought into contact therewith. The facing corner parts of the rod is connected to the probe board 1 and grounded. Only the deep probes corresponding to the pads of the semiconductor element 10 to be inspected are brought into contact with the pads. The deep probes, which do not correspond to the pads, are lifted by the driving with driving means 5 and 6 so that the probes are not brought into contact with the pads.
JP17161487A 1987-07-09 1987-07-09 Prober Pending JPS6414937A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP17161487A JPS6414937A (en) 1987-07-09 1987-07-09 Prober

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP17161487A JPS6414937A (en) 1987-07-09 1987-07-09 Prober

Publications (1)

Publication Number Publication Date
JPS6414937A true JPS6414937A (en) 1989-01-19

Family

ID=15926436

Family Applications (1)

Application Number Title Priority Date Filing Date
JP17161487A Pending JPS6414937A (en) 1987-07-09 1987-07-09 Prober

Country Status (1)

Country Link
JP (1) JPS6414937A (en)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2004045089A (en) * 2002-07-09 2004-02-12 Fujitsu Ltd Probe card and semiconductor test equipment
WO2018078752A1 (en) * 2016-10-26 2018-05-03 三菱電機株式会社 Inspection device and inspection method

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2004045089A (en) * 2002-07-09 2004-02-12 Fujitsu Ltd Probe card and semiconductor test equipment
WO2018078752A1 (en) * 2016-10-26 2018-05-03 三菱電機株式会社 Inspection device and inspection method

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