JPS6415833A - Microcomputer - Google Patents

Microcomputer

Info

Publication number
JPS6415833A
JPS6415833A JP62172143A JP17214387A JPS6415833A JP S6415833 A JPS6415833 A JP S6415833A JP 62172143 A JP62172143 A JP 62172143A JP 17214387 A JP17214387 A JP 17214387A JP S6415833 A JPS6415833 A JP S6415833A
Authority
JP
Japan
Prior art keywords
register
instruction
temporary
stores
contents
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP62172143A
Other languages
Japanese (ja)
Other versions
JPH0570861B2 (en
Inventor
Yoshitaka Kitada
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Corp
Original Assignee
NEC Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NEC Corp filed Critical NEC Corp
Priority to JP62172143A priority Critical patent/JPS6415833A/en
Publication of JPS6415833A publication Critical patent/JPS6415833A/en
Publication of JPH0570861B2 publication Critical patent/JPH0570861B2/ja
Granted legal-status Critical Current

Links

Landscapes

  • Test And Diagnosis Of Digital Computers (AREA)
  • Microcomputers (AREA)

Abstract

PURPOSE:To easily check whether an instruction is correctly carried out or not by using a means which initializes the temporary registers related to execution of instruction at the prescribed value at every execution of instructions. CONSTITUTION:An instruction decoding part 4 reads out an instruction to decode it and designates an address of a memory part 2. A general-purpose register part 3 designates an A register to read it out to an internal bus line 5. A temporary register 11 stores temporarily the contents of the A register. Then the part 2 reads out the memory contents to the line 5 and stores them temporarily in a temporary register 12. A logical arithmetic circuit 10 carries out an arithmetic operation, e.g., the addition and stores the result of this operation in a temporary register 14. Then a buffer 13 is turned on for output of the contents of the register 14 to the line 5. Thus the arithmetic operation is through and the registers 11, 12 and 14 are cleared by a clear signal 30. In such a way, the reading defect of the A register can be easily detected and deleted.
JP62172143A 1987-07-09 1987-07-09 Microcomputer Granted JPS6415833A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP62172143A JPS6415833A (en) 1987-07-09 1987-07-09 Microcomputer

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP62172143A JPS6415833A (en) 1987-07-09 1987-07-09 Microcomputer

Publications (2)

Publication Number Publication Date
JPS6415833A true JPS6415833A (en) 1989-01-19
JPH0570861B2 JPH0570861B2 (en) 1993-10-06

Family

ID=15936361

Family Applications (1)

Application Number Title Priority Date Filing Date
JP62172143A Granted JPS6415833A (en) 1987-07-09 1987-07-09 Microcomputer

Country Status (1)

Country Link
JP (1) JPS6415833A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5672381A (en) * 1990-05-15 1997-09-30 Minnesota Mining And Manufacturing Company Printing of reflective sheeting

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5672381A (en) * 1990-05-15 1997-09-30 Minnesota Mining And Manufacturing Company Printing of reflective sheeting

Also Published As

Publication number Publication date
JPH0570861B2 (en) 1993-10-06

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