JPS641794B2 - - Google Patents

Description

[Detailed Description of the Invention] (1) Background of the Invention A. Technical Field of the Invention The present invention relates to text editing using a CRT (cathode ray tube). The present invention particularly relates to technology that supports word processing functions while simultaneously displaying one page of text smaller than the entire display surface. B. Characteristics of the prior art In a word processing system equipped with a display device that displays input and edited text, the operator is usually limited by the size of the display surface and can only display one part of the text.
It is not possible to display the entire page; however, by viewing the entire page, the operator can identify whether the text is properly positioned relative to the page boundaries.
It is often necessary to view an entire page on a display surface. One prior art technique for solving this problem is described in US Pat. No. 4,168,489. According to it,
The actual text characters are compressed to provide a reduced display format. The height of each character is reduced by reducing the number of dots in the column. Reducing the width of the characters is accomplished by a circuit that reduces the current flowing through the horizontal windings of the CRT's deflection yoke. The reduction in current compresses the width of the characters appearing on the display surface. The above patent also states that the reduction of pages of text is
We discuss other prior art techniques that are only suitable within the scope of word processing systems that display only a portion of a page, and point out why they are unsuitable. This mention suggests reducing the page size by about 1/3 to effectively fill the display surface.
That is, one page of text is displayed by reducing the size of the characters used to 2/3 both vertically and horizontally. In this case, not all of the compressed characters are easy to read. However, normal word processing functions can be performed. Another solution is IBM Technical
Disclosure Bulletin “Abbreviated”
Character Font Display”, Vol.9, No.9,
Described in Feb.1977, p.3248. The author, without actually reading the displayed text,
Techniques are disclosed for displaying important characters, words, and phrases to provide an operator with the ability to quickly access specific portions of the page. Yet another solution is IBM Technical
Disclosure Bulletin “Combination of
Alphanumeric and Formatting Data on the
CRT Display”, Vol.15 No.7, DeC.1972,
Explained on p.2136. Here, usually 5x7
Only one dot is used to represent each character of the dots. This technology allows the operator to see a full page of text displayed in dots only, as well as several lines of text in normal font size.
The area of the window where only the dots are displayed is increased in brightness so that the operator can see the formatting relationship between the displayed portion and the entire text. Furthermore, the operator can freely move the displayed window. The interaction of normal size text and reduced page or window areas is not disclosed in the above-mentioned article. There is also no attempt to make the display of text on the display surface proportional to the hard copy page size, print pitch, or placement. U.S. Pat. No. 4,107,664 relates to a raster-scan display system that increases the width of characters by increasing the number of times each dot is displayed in sequence. (2) Objects of the Invention A first object of the invention is to display an entire page of text smaller than the entire display surface while simultaneously performing normal word processing functions. A second object of the present invention is to provide a word processing system with an interaction scheme to enable understanding of the format and positional relationships of the text while simultaneously processing the text. A third object of the present invention is to provide the ability to display an entire page of text on a display surface of 25 lines x 80 characters. (3) Summary The above and other objects and features of the present invention are achieved by displaying a reduced page of one page of text on the display surface while displaying normal sized text lines. To maintain normal interactive word processing functionality, normal size text includes a scale line and a cursor display normal size text line. Reduced page display is 8×16
(dot) normal size characters are reduced to 2×
4 (dot) matrix character indicator
It fits in. The reduced page display includes a cursor position indicator that corresponds to a cursor associated with the normal sized text line being displayed. Expressed differently,
This means that two cursors are displayed. The first cursor is attached to the normal sized text line being displayed and is displayed within the entire text line. A second cursor is positioned within the displayed reduced page to precisely indicate the output position of the character to be displayed. The cursor moves along the scale line that accompanies the displayed text line and is visible to the operator during text editing. When scrolling horizontally, the cursor moves left and right across the display surface, while the cursor within the reduced page continues to position the characters of the text to be displayed in relation to the overall formatting of the page. (4) Features of the preferred embodiment A display surface 150 of a CRT is shown in FIG.
The extent of outline 152 represents a reduced page format of the page being processed and is analogous to the hard copy output ultimately obtained by operation of the word processing system. A reduced page is displayed to assist the operator in verifying the form. The operator can select the height and width of the output page through menu selections. Simple logic determines exactly where the reduced page output appears on the display surface. Scale line 154 indicates which 80 of a line of text
Indicates whether the character part is being processed. This is called horizontal scrolling and is
3654609 is known in the art as shown in the disclosure. The cursor symbol 155 shown in the scale line 154 is located directly above the line 156 currently being output. arrow 15
7 indicates a string of characters being processed, and "LINE26" indicated by an arrow 159 indicates a line of characters being processed. Arrow 1
The intersection of the vertical and horizontal lines defined by 57 and 159 indicates the position of the cursor on the reduced page. Since the cursor on the reduced page is small, the operator is informed of its position by blinking it. FIG. 2 is a block diagram of a typical operation of a word processing system, which is an embodiment of the present invention. The system in this figure includes a processor 6, a main memory 8, a display device, and a display device interface.
Contains logic 9. Only the connections between processor 6, main memory 8 and display interface 9 necessary for the explanation of the invention are shown. Other connections are conventional and well known to those skilled in the art. Timing generator 10 provides the various clock signals necessary for the word processing system. The waveform of the output signal of timing generator 10 is shown in FIG. The address clock signal on line 12 is input to a refresh memory address counter 14 whose output appears on a memory address bus 16. The addresses appearing on memory address bus 16 and input to refresh memory 18 are provided by processor 6. Both attribute bus 20 and character data bus 22 are outputs of refresh memory 18. Data on attribute bus 20 and character data bus 22 are held in memory output data latches 24. The other clock signal output from timing generator 10 is the data signal on line 26.
The clock is input to memory output data latch 24 and controls input signals from attribute bus 20 and character data bus 22. Eight bits (8-15) on bus 28 are the outputs from memory output data latch 24 and input to attribute decoder 30. The attribute data decoded by the attribute decoder 30 is transferred to the attribute bus 32.
and is input to the attribute delay synchronization latch 34 under the control of the delay clock signal on line 36. The output of the attribute data held in the attribute delay synchronization latch 34 is routed through the latch attribute bus 38 to the video output control 40.
The video output of video output control 40 is input via line 42 to a CRT (not shown) as a video input signal. The other 8 bits (0-7) of character data are output from memory output data latch 24 onto bus 44. A total of 16 bits (0-15) of character information from memory output data latches 24 are passed through buses 28 and 44 and are combined at data bus 46 for input into reduced page generator 50. Reduced page generator 50 also receives a data clock signal from timing generator 10 via line 26. The character clock signal on line 60 is also the output of timing generator 10. This signal is the horizontal control 62
and outputs a horizontal synchronization signal on line 64. This horizontal synchronization signal is one of the inputs of a CRT (not shown). Horizontal control 62 also outputs a horizontal reset signal on line 66. This signal is input to reduced page generator 50. Vertical clock signal is horizontal control 6
2 and input to vertical control 70 through line 68. Vertical control 70 outputs a vertical synchronization signal on line 72 to a CRT (not shown) in the conventional manner.
Vertical control 70 also sends a scan line count signal to bus 7.
Output to 4. The scan line count on bus 74 is input to reduced page generator 50 and character generator ROM (read only memory) 76. Vertical control 70 outputs a frame clock signal on line 78 to
Clock signal is frame FF (flip-flop)
Enter 80. Frame FF 80 generates an odd/even signal representing the frame status of the interlaced scan period, which is sent to character generation ROM 76 via line 82.
send to Character generator ROM 76 also receives input from bus 44. Timing generator 10 outputs a ROM enable signal on line 84 to AND gate 86.
The signal present at AND gate 86 is input to character generation ROM 76 through line 88. Reduced page generator 50 generates three output signals. The first output is reduced page data on bus 90. This data is output combined (wired OR) with the character data output from character generator ROM 76 onto bus 92, and the data on either bus 90 or bus 92 is input through bus 94 to parallel-in-serial-out shift register 96. . Serial data is output on line 98 to video output control 40.
The other output of reduced page generator 50 is the reduced page mode signal on line 100, which is inverted by N (NOT circuit) 102. The inverted signal is input to both attribute decoder 30 and AND circuit 86 through equation 104. Reduced page generator 50 also outputs a reduced page latch signal on line 108 and is reversed by N (NOT circuit) 110. The inverted signal is input to attribute decoder 30 through line 112. Reduced page generator 50 is an important element in implementing the present invention. The data of the reduced page displayed on the CRT display screen is written to the refresh memory 18 by a normal write operation. When an operator requests a word processing device embodying the present invention to display a reduced page, characters are read from main memory 8 using conventional techniques, and a "1" is written for a character and a "1" is written for a blank. are stored in the refresh memory 18 in groups of 16 bits of "0". FIG. 3 details the internal logic of reduced page generator 50. One of the 16 data bits (0-15) on bus 46, "bit 8", is the reduced page attribute bit and sets RS latch 222 through line 200. The reset input to RS latch 222 is provided by the horizontal reset signal on line 66. The output of RS latch 222 is the reduced page latch signal appearing on line 108, which is inverted by NOT circuit 110 of FIG. . The output of RS latch 222 is also on line 10.
8 becomes the data input of the D latch 230. The clock input of D-latch 230 is the data clock signal on line 26. The output of D latch 230 appears on line 100 as the reduced page mode signal, and the second
It is reversed by the NOT circuit 102 in the figure and sent to the attribute decoder 30 as an input of "prohibition 2". In FIG. 3, a bus 46 carrying 16 data bits connects to a 16-to-4 multiplexer 210. 16-to-4 multiplexer 210 connects 16 of buses 46
data bits are divided into four groups of four bits each. Line counts 2 and 4 on lines 213 and 215, respectively, are output from scan line count bus 74. In the 16-to-4 multiplexer 210, scan line count 2 is the input to select A and scan line count 4 is the input to select B. bus 46
The particular 4 bits taken from are a function of the states of scan line counts 2 and 4. The scan line count of 1 on line 216 becomes the output enable signal for 16-to-4 multiplexer 210. Each group of four data bits is decomposed and assigned one bit each to lines 242, 244, 246 and 248 as the output of 16-to-4 multiplexer 210. lines 242, 24
4, 246 and 248 are each connected to two input lines and to the output driver 240. When the reduced page mode signal appears on line 100, output driver 240 is output enabled. line 242
The two bits obtained from one bit of
is output to 252. Similarly, the two bits from line 244 are output on lines 254 and 256, the two bits from line 246 are output on lines 258 and 260, and the two bits from line 248 are output on lines 262 and 264. These eight bits appear as parallel data bytes on reduced page data bus 90 and are input to parallel-in-serial-out shift register 96 of FIG. Parallel input serial output shift register 9 in Figure 2
6 serial outputs control the video output in the usual way 40
sent to. In this way, as a result of inspecting the data stored in the main memory 8 of this device, one bit stored in the refresh memory 18 is:
The output of reduced page mode is a pair of dots in a 2x4 character box. FIG. 4 is a schematic diagram of a normal size character frame 410 intended by the present invention. In a typical embodiment of the invention, this text box is 8 x 16, or 8 dot columns wide and 16 dot rows high. Dot row is R1
-R16, dot rows are indicated by symbols C1-C8.
A conventional CRT with interlaced scanning is capable of displaying 8 x 16 dot matrix characters, as is well known to those skilled in the art. Not all positions in each of these matrices are always used for a given character. For example, regular characters fall within dot rows 4-12, with unused dot rows reserved for subscripts and superscripts and/or space between lines. Also, ordinary characters fall within the range of dot rows 2-7, and unused dot rows are reserved for space between characters. FIG. 5 shows how the same 8x16 character box 410 is divided to display sixteen 2x4 reduced character boxes. By this method,
A total of 16 characters, 4 characters in reduced size, can be displayed in each blank space of 4 consecutive dot lines in the space occupied by one normal size character on the CRT display surface. What should be particularly noted here is that the reduced characters in the present invention are different from the original characters. However, by displaying reduced characters, the operator can grasp the relationship between the format and margins of the page being processed. The above-mentioned reduced characters enable reduced page representation with minimal impact on hardware. The use of interlaced scanning is advantageous for this character display structure. In interlaced scanning, half of all horizontal scan lines are scanned every other line. This is named scan field 1. The other half of the horizontal scan lines are scanned alternately with field 1. This is named scanning field 2. Scan fields 1 and 2 are interlaced. In FIG. 5, F1 and F2 represent scanning fields 1 and 2, respectively, and the 16 dot rows represent scanning field 1 consisting of 0F1, 1F1, 2F1...7F1, 0F2, 1F2, 2F2...
It is divided into scanning field 2 consisting of 7F2. Treating "0" as the corner number, it can be seen in FIG. 5 that in both scan fields 1 and 2, the even numbered dot rows have no dots and are blank. In the 16 individual character boxes separated by thick borders, the top two-dot row is an even number and is always blank, and the bottom two-dot row represents a character or blank. Character frame 518
represents a character, and the character frame 520 represents a blank. Inside the outline 152 showing the reduced page in FIG.
This indicates that there are a plurality of reduced characters shown in 8 adjacent to each other. Blank 160 in FIG. 1 comprises the blank shown by text box 520 in FIG. The outline 152 consists of the above-mentioned letters and blanks, representing a dotted line. FIG. 6 is a flow diagram of the display interface logic 9 for displaying the bold line portion 158 and blank 160 of FIG. 1 on a CRT display surface.
The process illustrated here is performed by processor 6 (second
The refresh memory 18 is controlled by
After “1” and “0” are loaded in (Figure 2),
This is done in a reduced page generator 50 (FIG. 2), and a reduced page consisting of reduced characters and blanks appears on the display surface. Textual data is stored in the word processing device's main memory 8 (FIG. 2), as is well understood by those skilled in the art. Access to data in main memory 8 can be performed using conventional techniques. The processing flow shown in FIG. 6 applies to character data on data bus 46 of FIG. These data are transferred from refresh memory 18 in FIG. 2 via buses 20 and 22 to memory output data latch 24.
to go into. The process flow of FIG. 6 begins at block 670. The scan line count SLC is set to an initial value of "0" in block 672. Similarly, character count
CC is set to an initial value of "0" in block 674. Decision block 676 then determines whether output of a reduced page is requested. This determination is made by examining the attribute bits dedicated to the reduced page function. In FIG. 3, the reduced page attribute bit is bit "8" on line 200. In FIG. 6, when a reduced page is requested, block 678 determines whether the scan line count SLC is an even number. In FIG. 2, the scan line count signal on bus 74 is generated in hardware by vertical control 70. In FIG. In FIG. 6, if the scan line count is even, eight "0" bits are output at block 680 and a blank is displayed on the display surface. If the scan line count is odd, control passes to block 682 which outputs the contents contained in the four character indicator bits retrieved from bus 46 of FIG. If that bit is “1”, it is “1”
However, if it is also "0", "0" is output to the reduced page data bus 90 of FIGS. 2 and 3. Each bit thus displayed as a blank or dot is displayed twice. That is, each bit is output twice on bus 90 of FIG. Each bit is displayed twice because data lines 242, 244, 246 and 248 of FIG. 3 each enter block 240 twice. Four horizontal scans are required to form one reduced character height. Each dot row of the reduced character frame in FIG. 5 is given a name from OF1 to 7F2, and 0-7 on the left side corresponds to the scanning line count SLC. When SLC is an even number such as 0, 2, 4, or 6, "0" is sent to the video output control 40 (FIG. 2) by the processing in block 680 of FIG. 6, and a blank is displayed on the CRT display screen. do. Similarly,
When SLC is an odd number such as 1, 3, 5, or 7 in FIG. arise. Once block 680 or 682 has been processed, depending on whether SLC is even or odd, the next operation is to count the characters in block 684 (Figure 6).
is to increment CC. In block 686,
A comparison is made to determine the relationship between the previously determined maximum number of characters to be displayed in a row of a particular reduced page display and the character count CC. If the character count is greater than or equal to this maximum value, the scan line count SLC is incremented by one at block 688, while the horizontal scan is blanked. If the character count is less than the maximum value, control is returned to block 678 to complete the line being displayed. After the scan line count is incremented by one in block 688, a comparison is made in block 690 to determine the relationship between the magnitude of the scan line count and a predetermined maximum value, such that the scan line count is equal to the maximum value. If it is, control is returned to block 674, the character count is reset to "0", and
The process is repeated according to the flowchart. If the scan line count is greater than or equal to the above maximum value, processing ends at block 698. If decision block 676 determines that a reduced page is not required, then block 692 outputs normal text dash-dash lines. Character count CC is incremented by "1" at block 694. A determination is made at block 696 whether the character count CC is greater than or equal to the maximum value allowed, and if so, the scan line count is incremented by one at block 688 and processed according to the flowchart. can be continued.
If the character count is less than the maximum value above,
Control is returned to decision block 676 which determines whether a reduced page is requested. If the scan line count does not reach the maximum value at block 690, control returns to block 6, where the character count is given an initial value.
It is returned to 74. In this embodiment, the scanning line count can reach the maximum value "7". The number of horizontal scan lines is 16 per line for regular characters. In Figure 4, normal size characters are represented by an 8 x 16 matrix. There are 16 horizontal scanning lines. Since the interlaced scanning method is adopted here, eight horizontal scanning lines appear in each of the scanning of field 1 and field 2, as described above. These scan lines are numbered 0-7 for each field. The scan line count refers to this number, not the total number of character lines that appear on the display surface. FIG. 7 illustrates the operations performed by the processor 6 of FIG. 2 to load data regarding the reduced page to be displayed into the refresh memory 18. The operator of a word processing system implementing the invention is presented with a menu in the usual manner and can select one of several options. The operator is given the opportunity to inform the system about the size and format of the page. Block 700 in FIG. 7 is the starting point for displaying a reduced page. Block 702 represents searching for the width W of the reduced page specified by the operator, and similarly, block 704 represents searching for the height H of the reduced page specified by the operator. Block 706 shows a calculation formula for determining the number N of blanks to provide a margin on the left side of the reduced page on the display surface. In this embodiment, the display surface is 80 characters (width) x 25 lines (height). The reduced page is located in the center of the display surface. It is also possible to perform calculations when using display surfaces of different sizes or shifting the position of the reduced page from the center of the display surface. Block 708 reduces page line count MLC
is set to an initial value of 1. MLC is used to count the number of lines in a reduced page of text in the output. Block 710 is the refresh block 710 shown in FIG.
Represents an instruction to load the N blanks calculated in block 706 into memory 18. The fact that N can be any combination of letters, symbols, and spaces is
It should be clear to the person skilled in the art here. This method allows normal size letters and text to be displayed on the left side of the reduced page. Looking at this in FIG. 1, it is the explanatory note "LINE26" on the left side of the outline 152 of the reduced page. In block 712 of FIG. 7, a so-called dynamic mode switch takes place. This will become clear from the explanation accompanying FIG. 8, but for now we will just say that the indicator bit is loaded by the hardware to switch to reduced page mode. At block 714, the reduced page character indicator for one line of text is loaded into the refresh memory 18 of FIG. Decision block 716 determines whether the value of reduced page line count MLC has reached the value of page height H specified by the operator in block 704. If MLC has not reached H, a determination is made at block 718 whether MLC is an integer multiple of four. If MLC is an integer multiple of 4, it means that 4 text lines of the reduced page, which correspond to the size of one normal-sized text line, have been loaded into the refresh memory 18 in FIG. 2, and MLC is Block 720 increments by one and control is returned to block 710. If MLC is not an integer multiple of four, block 722 similarly increments by one, but control is returned to block 714 where another row of the reduced page is loaded into refresh memory 18. Judgment block 7
If MLC reaches page height H at 16,
Processing ends at block 730. Refresh memory 18 of FIG. 2 uses a special display buffer. This has a 2-byte boundary. Each byte is 8 bits long. This 2
Bytes are used for ordinary characters. The 8 bits on the left are used as attribute data, and the 8 bits on the right are used as actual character data. 820 in FIG. 8 shows two such 2-byte entries. 8 bits used for attribute data is byte 82
2. The 8 bits used for character information are shown in byte 824. However, for a particular output line containing a reduced character indicator, the reduced page attribute data only appears once. From then on, all data is treated as representing reduced characters. One of the eight bits is normally held as attribute data and is used to instruct mode switching from normal size to reduced page. As mentioned in the description of FIG. 3, this attribute bit appears on line 200 and the operation of the hardware of FIG.
The data bits sent to 4 are character generated.
Bypass ROM76. As previously discussed in connection with FIGS. 4 and 5, sixteen reduced characters are stored in the refresh memory 18 in the space of one character normally occupied by the attributes and character information of a normal size character. This is shown in 8-bit blocks 826 and 828 in FIG. In FIG. 7, block 712 shows the output of attributes of the reduced page. This function can also be better understood by relating it to FIG. For example, the attribute byte at byte 822 contains the correct bits to indicate that a reduced page row is coming. Since the reduced page data may immediately follow the characters, it is necessary to precede the reduced page with a blank when displaying the reduced page. The next 16 bits are then the output from the reduced page generator 50 and are 16 2.times.4 reduced characters as previously described. In this way, the character indicators of the reduced page are printed on the remainder of the line. While the horizontal scan is being reset, all attributes are reset. The process of indicating when a mode switch is requested is thus repeated for each scan line. Because the reduced page mode indicated by the attribute continues for the remainder of the scanline, normal-sized character data cannot be displayed on the right side of the reduced page. (5) Operation of the Invention When a request for reduced page mode is communicated to the device by an operator's keyboard input, certain bits are placed in the blank attribute byte of the last character before the reduced page is displayed. is set. The device is
Once a scan line is in reduced page mode, the remainder of the scan line is configured to be in reduced page mode. Normal size text can be displayed up to the start of the reduced page for that scanline. However, on the device shown here, as mentioned earlier, normal size characters fit into an 8 x 16 character frame, and characters used in reduced page mode are
It fits into the x4 character frame. Each of the 16 reduced characters displayed in the space of one regular-sized character corresponds to four consecutive lines of text, with four characters per line. When the data stored in the main memory 8 of FIG. 2 is retrieved by the processor 6, a "1" bit for each character and a "0" bit for each blank are stored in the refresh memory. 18. In that case, the 16-bit locations are arranged in such a way that there are four groups of four bits representing the four characters or blanks of each of the four text lines. In FIG. 2, normal data flows from main memory 8 to refresh memory 18 when only normal size text is displayed. Typically, attribute bytes that control cursor, blinking, reverse video, etc. appear on attribute bus 20 and reach video output control 40. Data bytes appearing on character data bus 22 access character generator ROM 76 and the correct code is sent over buses 92 and 94 to parallel-in serial-out shift register 96 and from there to video control 40. However, when switched to reduced page mode, only one attribute bit is obtained for the remainder of the text line, and when this attribute bit is detected, the hardware switches and selects the attribute that goes to video control 40. The data path is cut off, as is the data bus 44 path leading to character generation ROM 76. Both attribute bus 20 and character data bus 22 reach video output control 40 via data bus 46, reduced page generator 50, bus 90, bus 94, and parallel-in serial-out shift register 96. As explained in the detailed diagram of the reduced page generator shown in FIG. is output to. The parallel data on bus 90 is converted to serial data via bus 94 in parallel-in-serial-out shift register 96 and sent to video output control 40, which controls the display on the display surface. The foregoing is a description of a technique that provides users of word processing devices with relatively small CRT display screens of 80 characters by 25 lines the ability to simultaneously display normal-sized character data and one reduced page. . The full page representation by reduced pages is proportional to the format of the hard copy output ultimately required. The normal size text data displayed at the top and left side of the reduced page includes arrow indicators. The intersection of the two arrows represents the current position of the cursor. This position is flickered by conventional techniques. Character indicators in the reduced page display are displayed by a combination of hardware and software. The user thus has the advantage of being able to simultaneously view, on a small standard CRT display surface, the relative position of the horizontal portion of the text line being processed, by means of a full-page display of reduced pages. All of these advantages are due to the technology in which each character is represented as 8 x 16 bits on the storage device, but as a 2 x 4 bit symbol on the display screen.

[Brief explanation of drawings]

FIG. 1 shows a CRT display screen when the present invention is implemented. FIG. 2 is a block diagram of a word processing system in which the present invention is implemented. FIG. 3 is a detailed diagram of the reduced page generator of FIG. FIG. 4 is a schematic diagram of a normal size character frame. FIG. 5 shows the relationship between the character frame and the normal size character frame in the reduced page display. FIG. 6 is a flow diagram of the hardware processing for displaying a reduced page. FIG. 7 is a flowchart of processing items performed by the software to display a reduced page. FIG. 8 shows two entries stored in the refresh memory 18 of FIG. FIG. 9 shows the waveform of the output signal of the timing generator of FIG. 6...Processor, 8...Main memory, 9...
Display interface logic, 10...
Timing generator, 14... Refresh memory address counter, 18... Refresh memory, 24... Memory output data latch, 30... Attribute decoder, 34... Attribute delay synchronization latch, 40... Video output Control, 50...Reduction page generator, 62...Horizontal control, 70...Vertical control, 76...Character generation ROM, 80...Frame FF, 96...Parallel input serial output shift register, 210...16 4-to-4 multiplexer, 22
2...RS latch, 230...D latch, 240
...Output driver.

Claims (1)

Claims: 1. Means for displaying at least a portion of a line of text being processed while simultaneously converting each character contained in a complete page of text into a reduced character indicator and displaying the entire page as a reduced page. A word processing device comprising: means for indicating a particular character in the text line; and means for indicating a reduced character indicator corresponding to the particular character on the reduced page.