JPS641974A - Self-diagnosing circuit for indicator - Google Patents

Self-diagnosing circuit for indicator

Info

Publication number
JPS641974A
JPS641974A JP15720287A JP15720287A JPS641974A JP S641974 A JPS641974 A JP S641974A JP 15720287 A JP15720287 A JP 15720287A JP 15720287 A JP15720287 A JP 15720287A JP S641974 A JPS641974 A JP S641974A
Authority
JP
Japan
Prior art keywords
signal
external output
output signal
self
outputted
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP15720287A
Other languages
Japanese (ja)
Other versions
JPH011974A (en
Inventor
Yoichiro Tanaka
Hideo Onishi
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Nissan Motor Co Ltd
Original Assignee
Nissan Motor Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Nissan Motor Co Ltd filed Critical Nissan Motor Co Ltd
Priority to JP62-157202A priority Critical patent/JPH011974A/en
Priority claimed from JP62-157202A external-priority patent/JPH011974A/en
Publication of JPS641974A publication Critical patent/JPS641974A/en
Publication of JPH011974A publication Critical patent/JPH011974A/en
Pending legal-status Critical Current

Links

Landscapes

  • Testing Electric Properties And Detecting Electric Faults (AREA)

Abstract

PURPOSE: To achieve a self-diagnosis of abnormality in an external output signal, by letting a detection signal pass only when an external output signal is outputted normally by a gate means to select the detection signal when a first pattern of a pseudo signal is outputted.
CONSTITUTION: In the self-diagnosing mode, a detection means 14 supplies a detection signal to a gate means 22 and a signal switching means 15 by a pseudo signal. According to a first pattern of the pseudo signal, signal forming means 18 and 20 output an external output signal to the gate means 22. When an external output signal is normal, a detection signal is outputted from a gate means 22. When the external output signal is abnormal, no detection signal is outputted from the gate means 22, and hence, an indication means SM indicates no specified value, thereby enabling the diagnosing of abnormality in the external output signal.
COPYRIGHT: (C)1989,JPO&Japio
JP62-157202A 1987-06-23 Self-diagnosis circuit of indicating device Pending JPH011974A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP62-157202A JPH011974A (en) 1987-06-23 Self-diagnosis circuit of indicating device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP62-157202A JPH011974A (en) 1987-06-23 Self-diagnosis circuit of indicating device

Publications (2)

Publication Number Publication Date
JPS641974A true JPS641974A (en) 1989-01-06
JPH011974A JPH011974A (en) 1989-01-06

Family

ID=

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPWO2005085882A1 (en) * 2004-03-09 2007-08-09 松下電器産業株式会社 Frequency sensor and semiconductor device

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPWO2005085882A1 (en) * 2004-03-09 2007-08-09 松下電器産業株式会社 Frequency sensor and semiconductor device

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