JPS6423636A - Signal protecting circuit - Google Patents

Signal protecting circuit

Info

Publication number
JPS6423636A
JPS6423636A JP17955087A JP17955087A JPS6423636A JP S6423636 A JPS6423636 A JP S6423636A JP 17955087 A JP17955087 A JP 17955087A JP 17955087 A JP17955087 A JP 17955087A JP S6423636 A JPS6423636 A JP S6423636A
Authority
JP
Japan
Prior art keywords
input signals
signals
error
storing
stored
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP17955087A
Other languages
Japanese (ja)
Inventor
Nobuhisa Kamoi
Yuji Takahashi
Kyoichi Tsukada
Toyohiko Yoshino
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fujitsu Ltd
Original Assignee
Fujitsu Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fujitsu Ltd filed Critical Fujitsu Ltd
Priority to JP17955087A priority Critical patent/JPS6423636A/en
Publication of JPS6423636A publication Critical patent/JPS6423636A/en
Pending legal-status Critical Current

Links

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  • Detection And Prevention Of Errors In Transmission (AREA)

Abstract

PURPOSE:To send stored latest normal signals so as to protect signals when a signal error occurs, by storing signals when no signal error occurs. CONSTITUTION:The frame synchronism of input signals is detected by means of a frame synchronism detecting means 1 and the error of the input signals is detected by means of an error detecting means 2 at every prescribed number (<1) of frames of the input signals. On the other hand, while the input signals are inputted to and stored in a storing means 3 at every prescribed number of frames, the storing data are outputted to a selecting means 4 after they are delayed in accordance with the output of the error detecting means 2. At the selecting means 4, the input signals are also stored temporarily at every prescribed number of frames and either one is selected from the stored input signals and the output signal of the storing means 3 at the same timing by means of the output of the error detecting means 2. Thus normal signals are always sent from the selecting means 4. Therefore, even when an error occurs in the code of a transmission line, the latest normal data before the occurrence of the code error can be sent.
JP17955087A 1987-07-17 1987-07-17 Signal protecting circuit Pending JPS6423636A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP17955087A JPS6423636A (en) 1987-07-17 1987-07-17 Signal protecting circuit

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP17955087A JPS6423636A (en) 1987-07-17 1987-07-17 Signal protecting circuit

Publications (1)

Publication Number Publication Date
JPS6423636A true JPS6423636A (en) 1989-01-26

Family

ID=16067705

Family Applications (1)

Application Number Title Priority Date Filing Date
JP17955087A Pending JPS6423636A (en) 1987-07-17 1987-07-17 Signal protecting circuit

Country Status (1)

Country Link
JP (1) JPS6423636A (en)

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