JPS6429045A - Data switching channel system - Google Patents

Data switching channel system

Info

Publication number
JPS6429045A
JPS6429045A JP18457687A JP18457687A JPS6429045A JP S6429045 A JPS6429045 A JP S6429045A JP 18457687 A JP18457687 A JP 18457687A JP 18457687 A JP18457687 A JP 18457687A JP S6429045 A JPS6429045 A JP S6429045A
Authority
JP
Japan
Prior art keywords
switch
sdsw
data
control bit
buf2
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP18457687A
Other languages
Japanese (ja)
Inventor
Yoshinori Yoshida
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Corp
Original Assignee
NEC Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NEC Corp filed Critical NEC Corp
Priority to JP18457687A priority Critical patent/JPS6429045A/en
Publication of JPS6429045A publication Critical patent/JPS6429045A/en
Pending legal-status Critical Current

Links

Landscapes

  • Data Exchanges In Wide-Area Networks (AREA)

Abstract

PURPOSE:To perform high-speed burst-like data switching without using a processor by adding a switch control bit to the head field of data, and controlling a multistage switch by using this control bit. CONSTITUTION:The data, to which the switch control bit is added at its head field, is stored in BUF1, BUF2 through header processing circuits IH1, IH2. In a switch control circuit SWC, block transfer data, outputted by the IH1, IH2, is given to a digital space division switch SDSW according to the detection output of the IH1, IH2, and the switch state signal of the switch element SE of a rear stage. The SDSW selects successively a destination channel by using the control bit. In this case, when the SDSW is busy, the transfer data is stored in the BUF1, BUF2 once, and after waiting an idle state, is given to the SDSW.
JP18457687A 1987-07-23 1987-07-23 Data switching channel system Pending JPS6429045A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP18457687A JPS6429045A (en) 1987-07-23 1987-07-23 Data switching channel system

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP18457687A JPS6429045A (en) 1987-07-23 1987-07-23 Data switching channel system

Publications (1)

Publication Number Publication Date
JPS6429045A true JPS6429045A (en) 1989-01-31

Family

ID=16155622

Family Applications (1)

Application Number Title Priority Date Filing Date
JP18457687A Pending JPS6429045A (en) 1987-07-23 1987-07-23 Data switching channel system

Country Status (1)

Country Link
JP (1) JPS6429045A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH024073A (en) * 1987-12-23 1990-01-09 Philips Gloeilampenfab:Nv Transmission system exchange network and exchange network controller

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH024073A (en) * 1987-12-23 1990-01-09 Philips Gloeilampenfab:Nv Transmission system exchange network and exchange network controller

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