JPS6431444U - - Google Patents
Info
- Publication number
- JPS6431444U JPS6431444U JP12543287U JP12543287U JPS6431444U JP S6431444 U JPS6431444 U JP S6431444U JP 12543287 U JP12543287 U JP 12543287U JP 12543287 U JP12543287 U JP 12543287U JP S6431444 U JPS6431444 U JP S6431444U
- Authority
- JP
- Japan
- Prior art keywords
- pld
- switch
- pod
- programmer
- target hardware
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 238000004549 pulsed laser deposition Methods 0.000 description 4
- 238000010586 diagram Methods 0.000 description 3
- 238000007796 conventional method Methods 0.000 description 1
Landscapes
- Test And Diagnosis Of Digital Computers (AREA)
Description
第１図は本考案の特に小規模ＰＬＤを対象とす
るデバツグ装置の一実施例を示す外観的構成図、
第２図は第１図の詳細を示す要部構成図、第３図
はＰＬＤを含むハードウエアをデバツグする際の
従来方式を説明するための図である。
１０……対象ハードウエア、５０……ＰＯＤ、
５１……プラグ、５３……ＰＬＤ、５４……スイ
ツチ、６０……本体部、６２……制御回路、６３
……ＰＬＤプログラマ。
FIG. 1 is an external configuration diagram showing an embodiment of a debugging device according to the present invention, which is particularly intended for small-scale PLDs;
FIG. 2 is a block diagram showing the details of FIG. 1, and FIG. 3 is a diagram for explaining a conventional method for debugging hardware including a PLD. 10...Target hardware, 50...POD,
51...Plug, 53...PLD, 54...Switch, 60...Main unit, 62...Control circuit, 63
...PLD programmer.
Claims (1)
る電気的消去および書き込みが可能なＰＬＤを搭
載すると共に、このＰＬＤとの接続を対象ハード
ウエア側か本体側かに切り替えるスイツチとを備
えてなるＰＯＤと、 ＰＬＤプログラマと、前記スイツチの動作およ
びＰＬＤプログラマの動作を制御する制御回路か
ら構成された本体部と を具備し、ＰＯＤ上のＰＬＤに対しプログラムの
書き込みおよび修正ができるようにすると共に、
前記スイツチの切り替えによりＰＬＤのプログラ
ムかＰＬＤの動作かを任意に選択し実行できるよ
うにしたことを特徴とするプログラム可能論理素
子用デバツグ装置。[Claims for Utility Model Registration] Equipped with an electrically erasable and writable PLD that operates in place of the PLD of the target hardware, and a switch that switches the connection to the PLD between the target hardware side and the main body side. A POD comprising a POD, a PLD programmer, and a control circuit for controlling the operation of the switch and the PLD programmer. Along with
A debugging device for a programmable logic element, characterized in that by switching the switch, it is possible to arbitrarily select and execute either a PLD program or a PLD operation.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP12543287U JPS6431444U (en) | 1987-08-18 | 1987-08-18 |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP12543287U JPS6431444U (en) | 1987-08-18 | 1987-08-18 |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPS6431444U true JPS6431444U (en) | 1989-02-27 |
Family
ID=31376034
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP12543287U Pending JPS6431444U (en) | 1987-08-18 | 1987-08-18 |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS6431444U (en) |
Citations (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS5578350A (en) * | 1978-12-08 | 1980-06-12 | Hitachi Ltd | Debug unit |
| JPS57146352A (en) * | 1981-03-04 | 1982-09-09 | Toshiba Corp | Debugging device |
-
1987
- 1987-08-18 JP JP12543287U patent/JPS6431444U/ja active Pending
Patent Citations (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS5578350A (en) * | 1978-12-08 | 1980-06-12 | Hitachi Ltd | Debug unit |
| JPS57146352A (en) * | 1981-03-04 | 1982-09-09 | Toshiba Corp | Debugging device |
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