JPS643242U - - Google Patents
Info
- Publication number
- JPS643242U JPS643242U JP9580287U JP9580287U JPS643242U JP S643242 U JPS643242 U JP S643242U JP 9580287 U JP9580287 U JP 9580287U JP 9580287 U JP9580287 U JP 9580287U JP S643242 U JPS643242 U JP S643242U
- Authority
- JP
- Japan
- Prior art keywords
- control transistor
- monitor control
- music
- circuit
- turned
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
- 239000003990 capacitor Substances 0.000 claims description 5
- 238000004804 winding Methods 0.000 claims 3
- 230000007274 generation of a signal involved in cell-cell signaling Effects 0.000 claims 2
- 238000006243 chemical reaction Methods 0.000 description 1
- 238000010586 diagram Methods 0.000 description 1
Description
図は本考案のモニタ回路の一実施例を組込んだ
電話装置の構成図。
主な図番の説明、１１……ライントランス、３
……第１コンデンサ、１７……モニタ制御トラン
ジスタ、１８……バイアス抵抗、１９……変換ト
ランジスタ、２３……第３抵抗。
The figure is a configuration diagram of a telephone device incorporating an embodiment of the monitor circuit of the present invention. Explanation of main drawing numbers, 11 ...Line transformer, 3
...First capacitor, 17...Monitor control transistor, 18...Bias resistor, 19...Conversion transistor, 23...Third resistor.
Claims (1)
したライントランスと、該ライントランスの第１
巻線及び第２巻線の一端と接地との間に接続した
第１コンデンサと、前記ライントランスの第２巻
線にエミツタを接続させると共にバイアス抵抗を
介しベースをエミツタに接続させたモニタ制御ト
ランジスタと、該モニタ制御トランジスタのコレ
クタと増幅回路との間に接続した第２コンデンサ
と、前記モニタ制御トランジスタのベースと接地
との間にエミツタとコレクタを接続した駆動トラ
ンジスタと、前記モニタ制御トランジスタのエミ
ツタコレクタ間に接続した抵抗と、前記電話回線
を保留状態にした時動作状態になり保留音信号を
前記モニタ制御トランジスタのエミツタに出力す
る保留音信号発生回路とよりなり、モニタ動作時
には、駆動トランジスタのオン動作により、前記
第１コンデンサの充電電圧は電話回線よりの直流
電圧に重畳し前記モニタ制御トランジスタのバイ
アス抵抗を介し、ベースに加わることにより、該
モニタ制御トランジスタはオン状態になり呼者の
信号を増幅回路に加えるようにし、又、保留時に
は駆動トランジスタをオフ状態にしてモニタ制御
トランジスタもオフ状態にさせ、前記保留音信号
発生回路よりの保留音信号をライントランスを介
し電話回線に送出すると共に前記抵抗を介して増
幅回路に加えるようにしたことを特徴とする電話
機のモニタ回路。 A line transformer connected to a telephone line via a diode bridge circuit, and a first line transformer of the line transformer.
a first capacitor connected between one end of the winding and the second winding and ground; and a monitor control transistor having an emitter connected to the second winding of the line transformer and a base connected to the emitter via a bias resistor. a second capacitor connected between the collector of the monitor control transistor and the amplifier circuit; a drive transistor whose emitter and collector are connected between the base of the monitor control transistor and ground; and a second capacitor connected between the collector of the monitor control transistor and the amplifier circuit; It consists of a resistor connected between the collectors and a music-on-hold signal generation circuit that becomes active when the telephone line is put on hold and outputs a music-on-hold signal to the emitter of the monitor control transistor. Due to the on operation, the charged voltage of the first capacitor is superimposed on the DC voltage from the telephone line and applied to the base of the monitor control transistor through the bias resistance, so that the monitor control transistor is turned on and the caller's voltage is turned on. The signal is applied to the amplifier circuit, and when the music is on hold, the driving transistor is turned off, the monitor control transistor is also turned off, and the music on hold signal from the music on hold signal generation circuit is sent to the telephone line via the line transformer. A monitor circuit for a telephone set, characterized in that the monitor circuit is applied to the amplifier circuit via the resistor.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP9580287U JPH051167Y2 (en) | 1987-06-22 | 1987-06-22 |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP9580287U JPH051167Y2 (en) | 1987-06-22 | 1987-06-22 |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPS643242U true JPS643242U (en) | 1989-01-10 |
| JPH051167Y2 JPH051167Y2 (en) | 1993-01-13 |
Family
ID=31320522
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP9580287U Expired - Lifetime JPH051167Y2 (en) | 1987-06-22 | 1987-06-22 |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPH051167Y2 (en) |
-
1987
- 1987-06-22 JP JP9580287U patent/JPH051167Y2/ja not_active Expired - Lifetime
Also Published As
| Publication number | Publication date |
|---|---|
| JPH051167Y2 (en) | 1993-01-13 |