JPS64345U - - Google Patents
Info
- Publication number
- JPS64345U JPS64345U JP9436087U JP9436087U JPS64345U JP S64345 U JPS64345 U JP S64345U JP 9436087 U JP9436087 U JP 9436087U JP 9436087 U JP9436087 U JP 9436087U JP S64345 U JPS64345 U JP S64345U
- Authority
- JP
- Japan
- Prior art keywords
- sequencer
- test
- circuits
- gate array
- test mode
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
- 238000010586 diagram Methods 0.000 description 5
- 230000007704 transition Effects 0.000 description 1
Landscapes
- Design And Manufacture Of Integrated Circuits (AREA)
- Programmable Controllers (AREA)
- Testing Of Individual Semiconductor Devices (AREA)
- Testing Or Measuring Of Semiconductors Or The Like (AREA)
- Semiconductor Integrated Circuits (AREA)
Description
第１図は本考案の基本的な構成ブロツク図、第
２図は本考案の一実施例を示す構成ブロツク図、
第３図はその動作波形図、第４図は従来のゲート
アレイの構成概念図、第５図はシーケンサの状態
遷移図である。
１……シーケンサ、２……その他の回路、３…
…テスト用回路、Ｆ……フリツプフロツプ。
FIG. 1 is a basic configuration block diagram of the present invention, FIG. 2 is a configuration block diagram showing an embodiment of the present invention,
FIG. 3 is an operational waveform diagram, FIG. 4 is a conceptual diagram of the configuration of a conventional gate array, and FIG. 5 is a state transition diagram of a sequencer. 1...Sequencer, 2...Other circuits, 3...
...Test circuit, F...Flip-flop.
Claims (1)
ートアレイであつて、 テストモードの時印加するテスト信号と前記そ
の他の回路へ入力される信号のひとつを入力し、
テストモード時前記シーケンサ内の各フリツプフ
ロツプを当該シーケンサへの入力信号とは関係な
くセツトするテスト用回路を設けたことを特徴と
するゲートアレイ。[Claims for Utility Model Registration] A gate array including a sequencer and other circuits therein, which inputs a test signal applied in a test mode and one of the signals input to the other circuits,
A gate array characterized in that a test circuit is provided for setting each flip-flop in the sequencer in a test mode regardless of an input signal to the sequencer.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP9436087U JPH069516Y2 (en) | 1987-06-19 | 1987-06-19 | Gate array |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP9436087U JPH069516Y2 (en) | 1987-06-19 | 1987-06-19 | Gate array |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPS64345U true JPS64345U (en) | 1989-01-05 |
| JPH069516Y2 JPH069516Y2 (en) | 1994-03-09 |
Family
ID=30957738
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP9436087U Expired - Lifetime JPH069516Y2 (en) | 1987-06-19 | 1987-06-19 | Gate array |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPH069516Y2 (en) |
-
1987
- 1987-06-19 JP JP9436087U patent/JPH069516Y2/en not_active Expired - Lifetime
Also Published As
| Publication number | Publication date |
|---|---|
| JPH069516Y2 (en) | 1994-03-09 |
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