JPS6436017A - Aligner for semiconductor wafer - Google Patents

Aligner for semiconductor wafer

Info

Publication number
JPS6436017A
JPS6436017A JP19167687A JP19167687A JPS6436017A JP S6436017 A JPS6436017 A JP S6436017A JP 19167687 A JP19167687 A JP 19167687A JP 19167687 A JP19167687 A JP 19167687A JP S6436017 A JPS6436017 A JP S6436017A
Authority
JP
Japan
Prior art keywords
mask
wafer
vacuum
stage
executed
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP19167687A
Other languages
Japanese (ja)
Inventor
Shinji Akaike
Masami Mizukami
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Tokyo Electron Ltd
Original Assignee
Tokyo Electron Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Tokyo Electron Ltd filed Critical Tokyo Electron Ltd
Priority to JP19167687A priority Critical patent/JPS6436017A/en
Publication of JPS6436017A publication Critical patent/JPS6436017A/en
Pending legal-status Critical Current

Links

Classifications

    • GPHYSICS
    • G03PHOTOGRAPHY; CINEMATOGRAPHY; ANALOGOUS TECHNIQUES USING WAVES OTHER THAN OPTICAL WAVES; ELECTROGRAPHY; HOLOGRAPHY
    • G03FPHOTOMECHANICAL PRODUCTION OF TEXTURED OR PATTERNED SURFACES, e.g. FOR PRINTING, FOR PROCESSING OF SEMICONDUCTOR DEVICES; MATERIALS THEREFOR; ORIGINALS THEREFOR; APPARATUS SPECIALLY ADAPTED THEREFOR
    • G03F7/00Photomechanical, e.g. photolithographic, production of textured or patterned surfaces, e.g. printing surfaces; Materials therefor, e.g. comprising photoresists; Apparatus specially adapted therefor
    • G03F7/70Microphotolithographic exposure; Apparatus therefor
    • G03F7/70691Handling of masks or workpieces
    • G03F7/70733Handling masks and workpieces, e.g. exchange of workpiece or mask, transport of workpiece or mask
    • G03F7/70741Handling masks outside exposure position, e.g. reticle libraries

Landscapes

  • Engineering & Computer Science (AREA)
  • Library & Information Science (AREA)
  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • Exposure Of Semiconductors, Excluding Electron Or Ion Beam Exposure (AREA)
  • Exposure And Positioning Against Photoresist Photosensitive Materials (AREA)
  • Container, Conveyance, Adherence, Positioning, Of Wafer (AREA)

Abstract

PURPOSE:To obtain the satisfactory alignment accuracy between a mask and a wafer by a method wherein a vacuum chuck is controlled in accordance with measured signals from a first vacuum sensor and a second vacuum sensor and the mask is transferred between a mask holder and a wafer-mask stage. CONSTITUTION:When a mask 8 is transferred between a mask holder 10 and a mask stage 4, a position of the mask 8 is detected by a change in a degree of vacuum which is measured by using vacuum sensors M1, M2; opening and closing valves 5, 11 are operated by a control device 13; a vacuum chuck is controlled. A wafer 2 and the mask 8 fixed on a wafer-mask stage 1 are trans ferred collectively to an exposure position; an exposure operation is executed. Accordingly, a relative positional relationship between the mask 8 and the wafer 2 is definite; a satisfactory alignment operation can be executed.
JP19167687A 1987-07-31 1987-07-31 Aligner for semiconductor wafer Pending JPS6436017A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP19167687A JPS6436017A (en) 1987-07-31 1987-07-31 Aligner for semiconductor wafer

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP19167687A JPS6436017A (en) 1987-07-31 1987-07-31 Aligner for semiconductor wafer

Publications (1)

Publication Number Publication Date
JPS6436017A true JPS6436017A (en) 1989-02-07

Family

ID=16278601

Family Applications (1)

Application Number Title Priority Date Filing Date
JP19167687A Pending JPS6436017A (en) 1987-07-31 1987-07-31 Aligner for semiconductor wafer

Country Status (1)

Country Link
JP (1) JPS6436017A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH03130727U (en) * 1990-04-13 1991-12-27

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH03130727U (en) * 1990-04-13 1991-12-27

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