JPS6437084A - Multilayer printed wiring board - Google Patents

Multilayer printed wiring board

Info

Publication number
JPS6437084A
JPS6437084A JP30839287A JP30839287A JPS6437084A JP S6437084 A JPS6437084 A JP S6437084A JP 30839287 A JP30839287 A JP 30839287A JP 30839287 A JP30839287 A JP 30839287A JP S6437084 A JPS6437084 A JP S6437084A
Authority
JP
Japan
Prior art keywords
conductor pattern
hole
layer substrate
wiring board
printed wiring
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP30839287A
Other languages
Japanese (ja)
Other versions
JPH0767012B2 (en
Inventor
Kunio Setsuda
Katsumi Kosaka
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Ibiden Co Ltd
Original Assignee
Ibiden Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Ibiden Co Ltd filed Critical Ibiden Co Ltd
Priority to JP62308392A priority Critical patent/JPH0767012B2/en
Publication of JPS6437084A publication Critical patent/JPS6437084A/en
Publication of JPH0767012B2 publication Critical patent/JPH0767012B2/en
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

Links

Landscapes

  • Production Of Multi-Layered Print Wiring Board (AREA)

Abstract

PURPOSE:To facilitate electrical connection between a conductor pattern formed on the surface of an outer layer substrate and a conductor pattern formed on an inner layer substrate by a method wherein a part of the conductor pattern on the outer layer substrate, the inside of a via-hole and the surface of the conductor pattern on the inner layer substrate facing the via-hole are solidly and electrically connected with copper plating to form a blind via-hole. CONSTITUTION:A part of a conductor pattern 11 formed on the surface of an outer layer substrate 5, the inside of a via-hole 6 and the surface of a conductor pattern 12 on an inner layer substrate 7 facing the via-hole 6 are solidly and electrically connected with copper plating 10 to form a blind via-hole 14. With this constitution, the conductor pattern of the outermost layer is connected electrically to the conductor pattern of the inner layer substrate side with the blind via-hole 14 and a multilayer printed wiring board 20 with highly reliable electrical connection can be obtained.
JP62308392A 1987-12-04 1987-12-04 Multilayer printed wiring board Expired - Lifetime JPH0767012B2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP62308392A JPH0767012B2 (en) 1987-12-04 1987-12-04 Multilayer printed wiring board

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP62308392A JPH0767012B2 (en) 1987-12-04 1987-12-04 Multilayer printed wiring board

Related Child Applications (1)

Application Number Title Priority Date Filing Date
JP18836796A Division JPH08330737A (en) 1996-06-27 1996-06-27 Multilayered printed-wiring board

Publications (2)

Publication Number Publication Date
JPS6437084A true JPS6437084A (en) 1989-02-07
JPH0767012B2 JPH0767012B2 (en) 1995-07-19

Family

ID=17980510

Family Applications (1)

Application Number Title Priority Date Filing Date
JP62308392A Expired - Lifetime JPH0767012B2 (en) 1987-12-04 1987-12-04 Multilayer printed wiring board

Country Status (1)

Country Link
JP (1) JPH0767012B2 (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH08330737A (en) * 1996-06-27 1996-12-13 Ibiden Co Ltd Multilayered printed-wiring board

Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS6041290A (en) * 1984-07-09 1985-03-04 ソニー株式会社 Method of producing multilayer wiring board
JPS6084898A (en) * 1983-10-14 1985-05-14 セイコーインスツルメンツ株式会社 Method of wiring multilayer
JPS6196578U (en) * 1984-11-30 1986-06-21

Patent Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS6084898A (en) * 1983-10-14 1985-05-14 セイコーインスツルメンツ株式会社 Method of wiring multilayer
JPS6041290A (en) * 1984-07-09 1985-03-04 ソニー株式会社 Method of producing multilayer wiring board
JPS6196578U (en) * 1984-11-30 1986-06-21

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH08330737A (en) * 1996-06-27 1996-12-13 Ibiden Co Ltd Multilayered printed-wiring board

Also Published As

Publication number Publication date
JPH0767012B2 (en) 1995-07-19

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